公开(公告)号：US20110006376A1

公开(公告)日：2011-01-13

申请号：US12922119

申请日：2009-03-03

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/30 ,  H01L29/739

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1266 ,  H01L29/4908 ,  H01L29/66772

摘要： The present invention provides a semiconductor device capable of improving subthreshold characteristics of a PMOS transistor that is included in a thinned base layer and bonded to another substrate, a production method of such a semiconductor device, and a display device. The semiconductor device of the present invention is a semiconductor device, including: a substrate; and a device part bonded to the substrate, the device part including a base layer and a PMOS transistor, the PMOS transistor including a first electrical conduction path and a first gate electrode, the first electrical conduction path being provided inside the base layer on a side where the first gate electrode is disposed.

摘要翻译： 本发明提供一种半导体器件，其能够改善包括在薄化的基底层中并结合到另一衬底的PMOS晶体管的亚阈值特性，这种半导体器件的制造方法和显示器件。 本发明的半导体器件是半导体器件，包括：衬底; 以及与基板接合的器件部件，所述器件部件包括基极层和PMOS晶体管，所述PMOS晶体管包括第一导电路径和第一栅电极，所述第一导电路径设置在所述基极层的侧面 其中设置第一栅电极。

公开(公告)号：US08207046B2

公开(公告)日：2012-06-26

申请号：US12682221

申请日：2008-10-21

申请人： Michiko Takei ,  Shin Matsumoto ,  Yasumori Fukushima ,  Yutaka Takafuji

发明人： Michiko Takei ,  Shin Matsumoto ,  Yasumori Fukushima ,  Yutaka Takafuji

IPC分类号： H01L21/02

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： To prevent bubbles from occurring along a transfer interface, the present method includes the steps of: forming a peeled layer 10 in a transferred member 6 by implanting a peeled-layer forming substance into the transferred member 6; forming a planar surface in the transferred member 6 by planarizing a surface of the transferred member 6; forming a composite including the transferred member 6 and a glass substrate 2 by directly combining the transferred member 6 via the planar surface with a surface of the glass substrate 2; and peeling a part of the transferred member 6 from the composite along the peeled layer 10 serving as an interface by heat-treating the composite.

摘要翻译： 为了防止沿着转移界面发生气泡，本方法包括以下步骤：通过将剥离层形成物质注入到被转印元件6中，在转印元件6中形成剥离层10; 通过使转印部件6的表面平坦化，在被转印部件6中形成平面; 通过经由平面表面直接将转印部件6与玻璃基板2的表面直接组合，形成包括转印部件6和玻璃基板2的复合体; 以及通过热处理复合材料，沿着作为界面的剥离层10将复合材料的一部分从复合材料剥离。

公开(公告)号：US20100207212A1

公开(公告)日：2010-08-19

申请号：US12682221

申请日：2008-10-21

申请人： Michiko Takei ,  Shin Matsumoto ,  Yasumori Fukushima ,  Yutaka Takafuji

发明人： Michiko Takei ,  Shin Matsumoto ,  Yasumori Fukushima ,  Yutaka Takafuji

IPC分类号： H01L29/786 ,  H01L21/762 ,  H01L29/30

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772

摘要： To prevent bubbles from occurring along a transfer interface, the present method includes the steps of: forming a peeled layer 10 in a transferred member 6 by implanting a peeled-layer forming substance into the transferred member 6; forming a planar surface in the transferred member 6 by planarizing a surface of the transferred member 6; forming a composite including the transferred member 6 and a glass substrate 2 by directly combining the transferred member 6 via the planar surface with a surface of the glass substrate 2; and peeling a part of the transferred member 6 from the composite along the peeled layer 10 serving as an interface by heat-treating the composite.

摘要翻译： 为了防止沿着转移界面发生气泡，本方法包括以下步骤：通过将剥离层形成物质注入到被转印元件6中，在转印元件6中形成剥离层10; 通过使转印部件6的表面平坦化，在被转印部件6中形成平面; 通过经由平面表面直接将转印部件6与玻璃基板2的表面直接组合，形成包括转印部件6和玻璃基板2的复合体; 以及通过热处理复合材料，沿着作为界面的剥离层10将复合材料的一部分从复合材料剥离。

公开(公告)号：US07838936B2

公开(公告)日：2010-11-23

申请号：US11884709

申请日：2006-03-09

申请人： Kazuhide Tomiyasu ,  Yutaka Takafuji ,  Masao Moriguchi

发明人： Kazuhide Tomiyasu ,  Yutaka Takafuji ,  Masao Moriguchi

IPC分类号： H01L27/12

CPC分类号： H01L27/1244 ,  G02F1/136227 ,  H01L21/2007 ,  H01L21/26506 ,  H01L27/0688 ,  H01L27/1229 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1266 ,  H01L29/7833

摘要： An active matrix substrate includes a glass substrate, a driver portion formed on the glass substrate in a protruding state, a stepped portion formed along a surface of the driver portion and a surface of the glass substrate, an insulating reentrant-angle compensating film formed on a surface of the stepped portion, for compensating for at least a part of a reentrant-angle shape of the stepped portion, and a wiring layer formed along a surface of the reentrant-angle compensating film and connected to the driver portion.

摘要翻译： 有源矩阵基板包括玻璃基板，在突出状态下形成在玻璃基板上的驱动部，沿着驱动部的表面形成的台阶部和玻璃基板的表面，形成在绝缘性折入角补偿膜上的绝缘性重入角补偿膜 所述阶梯部的表面用于补偿所述台阶部的折入角形状的至少一部分，以及沿着所述可重入角补偿膜的表面形成并连接到所述驱动部的布线层。

公开(公告)号：US20080164483A1

公开(公告)日：2008-07-10

申请号：US11884709

申请日：2006-03-09

申请人： Kazuhide Tomiyasu ,  Yutaka Takafuji ,  Masao Moriguchi

发明人： Kazuhide Tomiyasu ,  Yutaka Takafuji ,  Masao Moriguchi

IPC分类号： H01L29/06 ,  H01L21/425 ,  H01L33/00

CPC分类号： H01L27/1244 ,  G02F1/136227 ,  H01L21/2007 ,  H01L21/26506 ,  H01L27/0688 ,  H01L27/1229 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1266 ,  H01L29/7833

摘要： An active matrix substrate includes a glass substrate, a driver portion formed on the glass substrate in a protruding state, a stepped portion formed along a surface of the driver portion and a surface of the glass substrate, an insulating reentrant-angle compensating film formed on a surface of the stepped portion, for compensating for at least a part of a reentrant-angle shape of the stepped portion, and a wiring layer formed along a surface of the reentrant-angle compensating film and connected to the driver portion.

摘要翻译： 有源矩阵基板包括玻璃基板，在突出状态下形成在玻璃基板上的驱动部，沿着驱动部的表面形成的台阶部和玻璃基板的表面，形成在绝缘性折入角补偿膜上的绝缘性重入角补偿膜 所述阶梯部的表面用于补偿所述台阶部的折入角形状的至少一部分，以及沿着所述可重入角补偿膜的表面形成并连接到所述驱动部的布线层。

公开(公告)号：US08017492B2

公开(公告)日：2011-09-13

申请号：US12222598

申请日：2008-08-12

申请人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

发明人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

IPC分类号： H01L21/76

CPC分类号： H01L21/84 ,  H01L21/32 ,  H01L21/76254 ,  H01L27/1203 ,  H01L29/78654

摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

摘要翻译： 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域， 地区。 制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。

公开(公告)号：US20080128807A1

公开(公告)日：2008-06-05

申请号：US11792487

申请日：2005-11-15

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi

IPC分类号： H01L27/00 ,  H01L21/00

CPC分类号： H01L27/1203 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/265 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/76254 ,  H01L21/84 ,  H01L29/7833

摘要： In fabricating a semiconductor device, an element forming surface formation step of forming a plurality of element forming surfaces of different heights on a semiconductor layer to have different levels, a semiconductor element formation step of forming a plurality of semiconductor elements and, one in each of a corresponding number of regions of the semiconductor layer, each region including an associated one of the plurality of element forming surfaces, a level-difference compensation insulating film formation step of forming a level-difference compensation insulating film on the semiconductor layer to cover the semiconductor elements and have a surface with different levels along the element forming surfaces, a release layer formation step of forming a release layer in the semiconductor layer by ion-implanting a peeling material through the level-difference compensation insulating film into the semiconductor layer, and a separation step of separating part of the semiconductor layer along the release layer are performed.

摘要翻译： 在制造半导体器件时，在半导体层上形成具有不同高度的多个元件形成表面以形成不同电平的元件形成表面形成步骤，形成多个半导体元件的半导体元件形成步骤和 所述半导体层的相应数量的区域，每个区域包括所述多个元件形成表面中的相关联的一个元件形成表面;电平差补偿绝缘膜形成步骤，在所述半导体层上形成电平差补偿绝缘膜以覆盖所述半导体 元件，并且具有沿着元件形成表面具有不同水平的表面;剥离层形成步骤，通过将剥离材料通过电位差补偿绝缘膜离子注入到半导体层中而在半导体层中形成剥离层，以及 分离半导体层的一部分的分离步骤 沿着释放层进行。

公开(公告)号：US20050245046A1

公开(公告)日：2005-11-03

申请号：US11086680

申请日：2005-03-23

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： G02F1/1368 ,  G02F1/136 ,  G09F9/30 ,  G09G3/00 ,  H01L21/00 ,  H01L21/02 ,  H01L21/316 ,  H01L21/336 ,  H01L21/469 ,  H01L21/76 ,  H01L21/762 ,  H01L21/77 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/08 ,  H01L27/088 ,  H01L27/092 ,  H01L27/10 ,  H01L27/12 ,  H01L29/00 ,  H01L29/786

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括至少部分不包含阱的器件结构 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US08293621B2

公开(公告)日：2012-10-23

申请号：US13150620

申请日：2011-06-01

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： H01L21/322

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US20110278678A1

公开(公告)日：2011-11-17

申请号：US13146176

申请日：2009-12-17

申请人： Yasumori Fukushima ,  Yutaka Takafuji

发明人： Yasumori Fukushima ,  Yutaka Takafuji

IPC分类号： H01L27/092 ,  H01L21/28 ,  H01L29/772

CPC分类号： H01L27/1203 ,  H01L21/76898 ,  H01L21/84 ,  H01L27/1229 ,  H01L27/1251 ,  H01L27/1266

摘要： This invention provides a semiconductor device having a semiconductor element that has low-resistance and a stable contact connection, even when the wiring is connected from the side of the single-crystal silicon layer on which the impurity concentration is lower. This invention provides a semiconductor device comprising, on a substrate, a semiconductor device having a single-crystal semiconductor film and a wiring connected to the single-crystal semiconductor film, and in the single-crystal semiconductor film, an impurity concentration on one surface side is different from an impurity concentration on another surface side, the wiring being connected to the surface side on which the impurity concentration is lower, the resistivity of a region of the single-crystal semiconductor film to which the wiring is connected being no less than 1 μΩcm and no more than 0.01 Ωcm.

摘要翻译： 本发明提供一种半导体器件，其具有具有低电阻和稳定的接触连接的半导体元件，即使当布线从其上杂质浓度较低的单晶硅层的一侧连接时。 本发明提供了一种半导体器件，在衬底上包括具有单晶半导体膜的半导体器件和连接到单晶半导体膜的布线，在单晶半导体膜中，在一个表面侧的杂质浓度 与另一个表面侧的杂质浓度不同，该布线与杂质浓度较低的表面侧连接，配线所连接的单晶半导体膜的区域的电阻率不小于1 μ＆OHgr; cm和不大于0.01＆OHgr; cm。