公开(公告)号：US09117297B2

公开(公告)日：2015-08-25

申请号：US12706957

申请日：2010-02-17

Applicant: Per-Daniel Olsson ,  Aleksandar Filipov ,  Marcus Dan Anders Lorentzon

Inventor： Per-Daniel Olsson ,  Aleksandar Filipov ,  Marcus Dan Anders Lorentzon

IPC: G06T1/60 ,  G09G5/393

CPC classification number: G06T1/60 ,  G09G5/393

Abstract: An electronic device as taught herein offers reduced on-chip memory processing of graphics data, while also offering low memory bandwidth requirements. The electronic device includes a host block with off-chip memory, a graphics processing block with on-chip memory, a display controller, and a graphics display. The off-chip memory stores a frame of graphics data. The graphics processing block processes that frame of graphics data in blocks, or “tiles,” of graphics data. For each tile, the graphics processing block fetches rendering instructions and graphics data corresponding to that tile from the off-chip memory, stores the graphics data in the on-chip memory, and renders pixel values for the tile by processing the graphics data in accordance with the rendering instructions. The graphics processing block then sends the rendered pixel values for the tile directly to the display controller and partially updates the graphics display memory with those rendered pixel values.

Abstract translation: 如本文教导的电子设备提供减少的图形数据的片上存储处理，同时还提供低的存储器带宽要求。 电子设备包括具有片外存储器的主机块，具有片上存储器的图形处理块，显示控制器和图形显示器。 片外存储器存储一帧图形数据。 图形处理块处理图形数据的框图形或图形数据的“瓦片”。 对于每个瓦片，图形处理块从片外存储器获取对应于该瓦片的渲染指令和图形数据，将图形数据存储在片上存储器中，并且通过根据图形数据处理图形数据来呈现瓦片的像素值 与渲染指令。 然后，图形处理块将用于瓦片的渲染像素值直接发送到显示控制器，并用那些渲染的像素值部分地更新图形显示存储器。

公开(公告)号：US09100258B2

公开(公告)日：2015-08-04

申请号：US14116290

申请日：2012-05-18

Applicant: Sébastien Aubert

Inventor： Sébastien Aubert

IPC: H04L1/02 ,  H04L27/26 ,  H04L25/03 ,  H04L25/02 ,  H04B7/06

CPC classification number: H04L27/2649 ,  H04B7/0697 ,  H04L25/0246 ,  H04L25/03216 ,  H04L25/03242 ,  H04L25/03968

Abstract: A detection process for a receiver of a wireless communication system based on Multiple-Input Multiple-Output antennas (nT, nR), said receiver processing observations symbols y derived from symbols x transmitted by an emitter through a channel H; characterized in that it involves: —a preprocessing which only depends on the channel H, said preprocessing involving: —a first QRD decomposition (61) for the purpose of decomposing said channel H into two Qext and Rext matrices, with QextHQext=/and Rext being upper triangular; —a lattice reduction (62) for the purpose of generating Qext, Rext and a transformation matrix T; —a second QRD decomposition (63) applied on the matrix Rext T−1 for the purpose of generating two matrixes Q′ext and R′ext, —a loading phase (64, 65, 66) comprising a linear detection process of the observations y for the purpose of generating a value xcenter; —a neighborhood search (67-70) performed in the Original Domain Neighborhood (ODN) with a search center being equal to the result xcenter of said loading phase, said neighborhood search determining a limited number of symbols (K-best).

Abstract translation: 一种用于基于多输入多输出天线（nT，nR）的无线通信系统的接收机的检测处理，所述接收机处理观察符号y从发射器通过信道H发送的符号x导出; 其特征在于它涉及： - 仅依赖于信道H的预处理，所述预处理涉及： - 为了将所述信道H分解为两个Qext和Rext矩阵，首先进行QRD分解（61），其中QextHQext = /和Rext 上三角形 - 用于生成Qext，Rext和变换矩阵T的晶格简化（62）; - 用于产生两个矩阵Q'ext和R'ext的加载阶段（64,65,66）的矩阵Rext T-1上的第二个QRD分解（63），包括观察值的线性检测过程 y用于生成值xcenter; - 在原始域邻域（ODN）中执行的邻域搜索（67-70），其中搜索中心等于所述加载阶段的结果xcenter，所述邻域搜索确定有限数量的符号（K最佳）。

公开(公告)号：US09092661B2

公开(公告)日：2015-07-28

申请号：US13884084

申请日：2011-11-14

Applicant: Stéphane Auberger ,  Adrien Graton

Inventor： Stéphane Auberger ,  Adrien Graton

IPC: G06K9/00

CPC classification number: G06K9/00281 ,  G06K9/00248

Abstract: There is described a method for facial features detection in a picture frame containing a skin tone area, comprising dividing (12) the skin tone area into a number of parts; and for each part of the skin tone area, constructing (14) a luminance map, constructing an edge map by extracting (18) edges from the luminance map, defining (20) an edge magnitude threshold, building (22) a binary map from the edge map by keeping only the edges having a magnitude beyond the defined edge magnitude threshold and eliminating the others; and then extracting (24) facial features from the built binary map. An inter-related facial features detector is further described.

Abstract translation: 描述了一种在包含肤色区域的图像帧中进行面部特征检测的方法，包括将肤色区域分割成多个部分; 并且对于肤色区域的每个部分，构造（14）亮度图，通过从亮度图提取（18）边缘来构造边缘图，定义（20）边缘幅度阈值，构建（22）二进制图， 通过仅保留具有超过限定的边缘幅度阈值的幅度的边缘并消除其他边缘图; 然后从建立的二进制图中提取（24）面部特征。 进一步描述相关的面部特征检测器。

公开(公告)号：US20150208399A1

公开(公告)日：2015-07-23

申请号：US14416666

申请日：2013-06-21

Applicant: ST-Ericsson SA

Inventor： Fabrizio Tomatis ,  Andrea Ancora

IPC: H04W72/04 ,  H04L25/02 ,  H04L25/03

CPC classification number: H04W72/0406 ,  H04B1/7083 ,  H04B2201/70701 ,  H04B2201/70702 ,  H04L25/0202 ,  H04L25/03866 ,  H04W16/02 ,  H04W48/20

Abstract: A method permitting a UE receiver to detect and then report to the network a scrambling code collision i.e. 2 neighbor cells are transmitting with the same scrambling code while timing is aligned. Furthermore the UE receiver is configured to decode code the PCCPCH's physical channel with all the associated broadcast information in presence of a scrambling code collision at the UE. It also allows the UE to report SFN-SFN information to the network, which is necessary to insure the UE mobility and then prepare the handover to a new detected cell. The process and apparatus described is applicable in the presence of MIMO and further improves the detection of the scrambling code collision in the presence of MIMO.

Abstract translation: 一种允许UE接收机检测然后向定时对准时向网络报告扰码冲突的方法，即2个相邻小区正在以相同的扰码进行发送。 此外，UE接收器被配置为在存在UE处的扰码冲突的情况下用所有相关联的广播信息对PCCPCH的物理信道进行解码。 它还允许UE向网络报告SFN-SFN信息，这对于确保UE移动性是必要的，然后准备到新的检测到的小区的切换。 所描述的过程和设备可应用于MIMO的存在，并且进一步改善了在存在MIMO的情况下对扰码冲突的检测。

公开(公告)号：US09088247B2

公开(公告)日：2015-07-21

申请号：US14056396

申请日：2013-10-17

Applicant: ST-Ericsson SA

Inventor： Patrik Arno ,  Matthieu Thomas

IPC: H03F3/189 ,  H03F1/02 ,  H03F3/24 ,  H03F3/72 ,  H02M1/00 ,  H02M3/156

CPC classification number: H03F3/189 ,  H02M2001/0045 ,  H02M2003/1566 ,  H03F1/0222 ,  H03F1/0227 ,  H03F1/0277 ,  H03F3/24 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/432 ,  H03F2200/555 ,  H03F2203/7221 ,  H03F2203/7236

Abstract: A multi-mode, dynamic, DC-DC converter supplies a dynamically varying voltage, as required, from a battery to an RF power amplifier (PA). In envelope tracking mode, a fast DC-DC converter generates a dynamic voltage that varies based on the amplitude envelope of an RF signal, and regulates the voltage at the PA. A slow DC-DC converter generates a steady voltage and regulates the voltage across a link capacitor. The fast and slow converters are in parallel from the view of the PA, and the link capacitor is between the fast converter and the PA. Because different nodes are regulated, no current sharing is possible between the converters. The link capacitor boosts the dynamic voltage level, allowing a maximum dynamic voltage at the load to exceed the battery voltage. In power level tracking mode, the fast converter is disabled and the link capacitor is configured to be in parallel with the load. The slow converter directly regulates the PA, and the link capacitor is in parallel with (added to) an output capacitor. Multiple wireless network standards may be supported, allowing for the sharing of RF circuits.

Abstract translation: 多模式动态DC-DC转换器根据需要从电池向RF功率放大器（PA）提供动态变化的电压。 在包络跟踪模式中，快速DC-DC转换器产生基于RF信号的幅度包络而变化的动态电压，并且调节PA处的电压。 缓慢的DC-DC转换器产生稳定的电压并且调节链路电容器两端的电压。 快速和慢速转换器与PA兼容，并且链路电容器位于快速转换器和PA之间。 因为不同的节点被调节，转换器之间不能进行电流共享。 链路电容提高动态电压电平，允许负载下的最大动态电压超过电池电压。 在功率电平跟踪模式下，禁用快速转换器，并将链路电容配置为与负载并联。 慢转换器直接调节PA，链路电容与输出电容并联。 可以支持多种无线网络标准，允许共享RF电路。

公开(公告)号：US09058049B2

公开(公告)日：2015-06-16

申请号：US13865494

申请日：2013-04-18

Applicant: ST-Ericsson SA

Inventor： Alexandre Pons ,  Gilles Chevalier

IPC: G05F1/00 ,  H02H7/00 ,  H02H9/00 ,  G05F1/46 ,  G05F1/565

CPC classification number: G05F1/46 ,  G05F1/565

Abstract: A low-power-mode unit connected in parallel with a low-dropout regulator to provide a low-power mode includes a power P-MOS transistor, a differential amplifier, and an analog synchronization loop. The analog synchronization loop is configured to add a variable voltage offset depending on a total current at the output such that, in a high-power mode, the low-power unit current flowing through the P-MOS transistor is not zero, while being substantially smaller than the low-dropout regulator current flowing through the low-dropout regulator, and smaller than a predetermined value.

Abstract translation: 与低压差稳压器并联连接以提供低功率模式的低功率模式单元包括功率P-MOS晶体管，差分放大器和模拟同步环路。 模拟同步环路被配置为根据输出端的总电流增加可变电压偏移，使得在大功率模式中流过P-MOS晶体管的低功率单元电流不为零，同时基本上 小于流过低压降稳压器的低压差稳压器电流，并小于预定值。

公开(公告)号：US09054646B2

公开(公告)日：2015-06-09

申请号：US13808604

申请日：2011-08-02

Applicant: Germano Nicollini ,  Federico Guanziroli ,  Massimo Orio ,  Carlo Pinna

Inventor： Germano Nicollini ,  Federico Guanziroli ,  Massimo Orio ,  Carlo Pinna

IPC: H03F3/181 ,  H03F1/30 ,  H03F1/34 ,  H03F3/187 ,  H03F3/213 ,  H03F3/45 ,  H03H19/00

CPC classification number: H03F3/181 ,  H03F1/30 ,  H03F1/34 ,  H03F3/187 ,  H03F3/213 ,  H03F3/45475 ,  H03F3/45968 ,  H03F3/45973 ,  H03F2200/03 ,  H03F2200/156 ,  H03F2200/271 ,  H03F2203/45136 ,  H03F2203/45156 ,  H03F2203/45212 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45534 ,  H03F2203/45544 ,  H03H19/004

Abstract: The invention relates to an electronic integrated amplifier for driving an acoustic transducer. The amplifier comprises two differential input terminals to receive an input signal and a first and a second output terminal to provide an output signal to the transducer. In addition, the amplifier comprises an operational amplifier having an input end including differential inputs and an output end operatively associated with the first and second output terminals. A pair of input resistors connect the two differential input terminals to two intermediate terminals, respectively. A pair of feedback resistors connect the first and second output terminals to the two intermediate terminals, respectively. The integrated amplifier also comprises means for high-pass filtering the input signal. Such filtering means is characterized in that it comprises an input element interposed between said intermediate terminals and the input end of the operational amplifier, and a feedback element connected between the input end and the output end of the same operational amplifier.

Abstract translation: 本发明涉及一种用于驱动声换能器的电子集成放大器。 放大器包括用于接收输入信号的两个差分输入端子和第一和第二输出端子以向换能器提供输出信号。 此外，放大器包括具有包括差分输入的输入端和与第一和第二输出端可操作地相关联的输出端的运算放大器。 一对输入电阻分别将两个差分输入端子连接到两个中间端子。 一对反馈电阻分别将第一和第二输出端子连接到两个中间端子。 集成放大器还包括用于对输入信号进行高通滤波的装置。 这种滤波装置的特征在于它包括插入在所述中间端子和运算放大器的输入端之间的输入元件，以及连接在同一运算放大器的输入端和输出端之间的反馈元件。

公开(公告)号：US20150131902A1

公开(公告)日：2015-05-14

申请号：US14404982

申请日：2013-06-18

Applicant: ST-Ericsson SA

Inventor： Luigi Arnone ,  Paolo Vicari

IPC: G06T7/40 ,  H04N9/73 ,  G06K9/46

CPC classification number: G06T7/408 ,  G06K9/4661 ,  G06T7/90 ,  G06T2207/10024 ,  G06T2207/20076 ,  H04N1/6077 ,  H04N1/6086 ,  H04N9/73

Abstract: The present invention provides a method for analyzing a digital image comprising a plurality of pixels representing a scene. The method comprising steps of obtaining pixel chromaticity information, providing, combinations each having a corresponding surface and a corresponding illuminant, performing a global scene surface-illuminant classification by determining hypothesis scores, accumulating hypothesis scores, thereby obtaining a global illuminant/surface statistic representing an estimate of a distribution of illuminants and/or surfaces in the scene as represented by the digital image. Other methods are also provided. Apparatuses for carrying out the methods are also provided.

Abstract translation: 本发明提供了一种用于分析包括表示场景的多个像素的数字图像的方法。 该方法包括以下步骤：获得像素色度信息，提供每个具有对应表面的组合和相应的光源，通过确定假设分数来执行全局场景表面光源分类，累积假设得分，从而获得表示全局光源/表面统计量 估计由数字图像表示的场景中的光源和/或表面的分布。 还提供了其他方法。 还提供了用于执行方法的装置。

公开(公告)号：US09030213B2

公开(公告)日：2015-05-12

申请号：US13148274

申请日：2010-01-28

Applicant: Eric Andre

Inventor： Eric Andre

IPC: G01R27/28 ,  H03H11/12

CPC classification number: H03H11/12

Abstract: A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Qs of the modulator is measured with the aid of an analog/digital converter, and the value of the time constant RC is determined on the basis of at least one measurement of the level of the DC component of the output signal Qs of the modulator carried out with the air of a measurement counter circuit.

Abstract translation: 提供了一种用于测量集成电子电路的时间常数RC的方法和系统。 该集成电路可以由第一硬件部件和第二硬件部件组成，其中硬件部件之一是电阻元件，另一个是电容元件。 第一和第二硬件组件连接到Δ-Σ调制器的积分器的运算放大器的反相输入端。 直流电压被施加到调制器输入端。 借助于模拟/数字转换器来测量调制器的输出信号Qs，并且基于对输出信号Qs的DC分量的电平的至少一个测量来确定时间常数RC的值 调制器用测量计数器电路的空气进行。

公开(公告)号：US09008595B2

公开(公告)日：2015-04-14

申请号：US13604776

申请日：2012-09-06

Applicant: Achraf Dhayni

Inventor： Achraf Dhayni

IPC: H03C1/62 ,  H04B17/00 ,  G01R29/10 ,  H04B1/04 ,  G01R31/04

CPC classification number: H04B17/14 ,  G01R29/10 ,  G01R31/041 ,  H04B17/102

Abstract: The invention concerns a testing method detecting misconnected mechanical contacts between off-chip antenna and on-chip antenna circuit, wherein the testing method is a Built-In Self-Test method including a step of measuring at least one electrical parameter of on-chip antenna circuit connected to off-chip antenna which is representative of state of connection of said mechanical contacts.

Abstract translation: 本发明涉及一种检测芯片外天线与片上天线电路之间的误连接的机械触点的测试方法，其中测试方法是内置自测方法，其包括测量片上天线的至少一个电参数 连接到片外天线的电路，其代表所述机械触点的连接状态。