公开(公告)号：US20160358805A1

公开(公告)日：2016-12-08

申请号：US15170532

申请日：2016-06-01

Applicant: Soitec

Inventor： Marcel Broekaart ,  Ionut Radu ,  Didier Landru

IPC: H01L21/683 ,  H01L21/762 ,  H01L21/48 ,  H01L23/13 ,  H01L21/56 ,  H01L23/15

CPC classification number: H01L21/6835 ,  H01L21/4803 ,  H01L21/76251 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2221/68381

Abstract: The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.

Abstract translation: 本公开涉及用于机械分离层的方法，特别是在双层转移工艺中。 本公开更具体地涉及用于机械分离层的方法，包括以下步骤：提供包括手柄衬底层和活性层的半导体化合物，其具有与前主侧相对的前主侧和后主侧， 其中所述手柄基板的所述层附着到所述有源层的前主侧，然后在所述有源层的所述后主侧上提供载体基板层，然后开始所述手柄基板的所述层的机械分离， 其中所述手柄基板的层和所述载体基板的层设置有基本对称的机械结构。

公开(公告)号：US20160336255A1

公开(公告)日：2016-11-17

申请号：US15044622

申请日：2016-02-16

Applicant: Mitsubishi Electric Corporation

Inventor： Katsumi MIYAWAKI ,  Tatsuto NISHIHARA

IPC: H01L23/373 ,  H01L23/367

CPC classification number: H01L23/3736 ,  H01L21/4803 ,  H01L23/043 ,  H01L23/13 ,  H01L23/142 ,  H01L23/4006 ,  H01L23/492 ,  H01L2224/48091 ,  H01L2224/49111 ,  H01L2924/00014

Abstract: A radiofrequency high-output device includes: a base plate having a mount portion and a flange portion; a frame joined to an upper surface of the mount portion; and a semiconductor chip mounted on the upper surface of the mount portion in the frame, wherein a cut or an aperture in which a screw is inserted to fix the base plate is provided in the flange portion, and a groove is provided between the mount portion and the flange portion of the base plate.

Abstract translation: 射频高输出装置包括：具有安装部分和凸缘部分的基板; 连接到所述安装部的上表面的框架; 以及安装在框架中的安装部的上表面上的半导体芯片，其中，在凸缘部设置有用于固定基板的螺钉插入的切口或孔，并且在安装部之间设置有槽 和基板的凸缘部分。

公开(公告)号：US09418925B2

公开(公告)日：2016-08-16

申请号：US14324642

申请日：2014-07-07

Applicant: Infineon Technologies Austria AG

Inventor： Martin Standing ,  Marcus Pawley

IPC: H01L23/04 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/04 ,  H01L21/4803 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/36 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49844 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/25 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/2518 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15153

Abstract: In an embodiment, an electronic component includes a dielectric core layer, one or semiconductor dies comprising a first major surface, a first electrode arranged on the first major surface and a second major surface that opposes the first major surface. One or more slots are arranged within the dielectric core layer adjacent the semiconductor die and a redistribution structure electrically couples the first electrode to a component contact pad arranged adjacent the second major surface of the semiconductor die. The semiconductor die is embedded in the dielectric core layer and a portion of the redistribution structure is arranged on side walls of the slot.

公开(公告)号：US20160233176A1

公开(公告)日：2016-08-11

申请号：US15009015

申请日：2016-01-28

Applicant: Toyota Jidosha Kabushiki Kaisha

Inventor： Kunihito Kato

IPC: H01L23/00 ,  H01L23/12 ,  H01L21/48

CPC classification number: H01L23/562 ,  H01L21/4803 ,  H01L27/0727 ,  H01L29/0834 ,  H01L29/7397

Abstract: A method for manufacturing a semiconductor device includes attaching a semiconductor substrate to a support substrate in a heated state, and processing the semiconductor substrate attached to the support substrate. The support substrate has a linear coefficient different from that of the semiconductor substrate. In an overlap region in which the support substrate overlaps the semiconductor substrate attached to the support substrate, a plurality of through-holes penetrating the support substrate from a front surface to a rear surface is provided. A straight line drawn on the front surface of the support substrate in any direction intersects with at least one of the through holes as long as the straight line is drawn through a center of the overlap region.

Abstract translation: 一种半导体装置的制造方法，其特征在于，在加热状态下，将半导体基板附着在支撑基板上，对所述支撑基板的半导体基板进行加工。 支撑衬底具有与半导体衬底的线性系数不同的线性系数。 在支撑基板与安装在支撑基板上的半导体基板重叠的重叠区域中，设置有从前表面到后表面贯穿支撑基板的多个通孔。 只要直线通过重叠区域的中心，在支撑基板的前表面上以任何方向绘制的直线与至少一个通孔相交。

公开(公告)号：US20160198576A1

公开(公告)日：2016-07-07

申请号：US14900860

申请日：2014-06-24

Applicant: President and Fellows of Harvard College

Inventor： Jennifer A. Lewis ,  Michael A. Bell ,  Travis A. Busbee ,  John E. Minardi

IPC: H05K3/12 ,  B29C67/00 ,  H01M4/04 ,  H05K7/02

CPC classification number: H05K3/125 ,  B29C64/00 ,  B29C64/106 ,  B29C70/72 ,  B33Y10/00 ,  B33Y80/00 ,  H01L21/4803 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/568 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/27 ,  H01L24/743 ,  H01L24/75 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L25/065 ,  H01L25/50 ,  H01L2224/24145 ,  H01L2224/27312 ,  H01L2224/75702 ,  H01L2224/76155 ,  H01L2224/83192 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1815 ,  H01M4/0411 ,  H01M2004/022 ,  H04R25/658 ,  H05K1/0284 ,  H05K1/185 ,  H05K3/1241 ,  H05K7/02 ,  H01L2924/00

Abstract: A printed 3D functional part includes a 3D structure comprising a structural material, and at least one functional electronic device is at least partially embedded in the 3D structure. The functional electronic device has a base secured against an interior surface of the 3D structure. One or more conductive filaments are at least partially embedded in the 3D structure and electrically connected to the at least one functional electronic device.

Abstract translation: 打印的3D功能部件包括包括结构材料的3D结构，并且至少部分地将至少一个功能电子设备嵌入3D结构中。 功能电子设备具有抵靠3D结构的内表面固定的基座。 一个或多个导电细丝至少部分地嵌入在3D结构中并电连接到至少一个功能电子器件。

公开(公告)号：US20160181168A1

公开(公告)日：2016-06-23

申请号：US14600691

申请日：2015-01-20

Applicant: Global Circuit Innovations Incorporated

Inventor： Erick Merle Spory

IPC: H01L23/053 ,  H01L23/20 ,  H01L21/48 ,  H01L23/00 ,  H01L21/52

CPC classification number: H01L24/49 ,  H01L21/4803 ,  H01L21/52 ,  H01L23/04 ,  H01L23/047 ,  H01L23/057 ,  H01L23/10 ,  H01L23/49551 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L24/98 ,  H01L2224/02311 ,  H01L2224/02317 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/03312 ,  H01L2224/03332 ,  H01L2224/03334 ,  H01L2224/03901 ,  H01L2224/04042 ,  H01L2224/0508 ,  H01L2224/05144 ,  H01L2224/05548 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/06051 ,  H01L2224/06102 ,  H01L2224/2919 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/741 ,  H01L2224/83192 ,  H01L2224/85207 ,  H01L2224/98 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/16152 ,  H01L2224/48 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A packaged integrated circuit for operating reliably at elevated temperatures is provided. The packaged integrated circuit includes a modified extracted die, which includes one or more extended bond pads, a package comprising a base and a lid, and a plurality of new bond wires. The modified extracted die is placed into a cavity of the base. After the modified extracted die is placed into the cavity, the plurality of new bond wires are bonded between the one or more extended bond pads of the modified extracted die and package leads of the package base or downbonds. After bonding the plurality of new bond wires, the lid is sealed to the base.

Abstract translation: 提供了一种用于在高温下可靠运行的封装集成电路。 封装的集成电路包括改进的提取模头，其包括一个或多个延伸的接合焊盘，包括基座和盖子的封装以及多个新的接合线。 将改良的提取的模具放入基座的空腔中。 在改进的提取的模具被放置到空腔中之后，多个新的接合线结合在改进的提取模具的一个或多个延伸的接合焊盘和封装基底的封装引线或者向下的焊接点之间。 在粘接多个新的接合线之后，将盖子密封到基座。

公开(公告)号：US20160155695A1

公开(公告)日：2016-06-02

申请号：US15005220

申请日：2016-01-25

Applicant: Invensas Corporation

Inventor： Hong Shen ,  Liang Wang ,  Rajesh Katkar

IPC: H01L23/498 ,  H01L23/48 ,  H01L23/538 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/055 ,  H01L21/2885 ,  H01L21/4803 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/76879 ,  H01L21/76897 ,  H01L23/04 ,  H01L23/10 ,  H01L23/147 ,  H01L23/3107 ,  H01L23/315 ,  H01L23/3675 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5389 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Stacked dies (110) are encapsulated in an interposer's cavity (304) by multiple encapsulant layers (524) formed of moldable material. Conductive paths (520, 623) connect the dies to the cavity's bottom all (304B) and, through TSVs passing through the bottom wall, to a conductor below the interposer. The conductive paths can be formed in segments each of which is formed in a through-hole (514) in a respective encapsulant layer. Each segment can be formed by electroplating onto a lower segment; the electroplating current can be provided from below the interposer through the TSVs and earlier formed segments. Other features are also provided.

公开(公告)号：US09312202B2

公开(公告)日：2016-04-12

申请号：US14692174

申请日：2015-04-21

Applicant: Hamilton Sundstrand Corporation

Inventor： Scott R. Bouras

IPC: H01L21/302 ,  H01L23/34 ,  H01L23/473 ,  H01L23/367 ,  H01L25/16 ,  H01L25/00 ,  H01L23/50 ,  H01L21/48 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/473 ,  H01L21/302 ,  H01L21/4803 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/50 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/162 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00

Abstract: A semiconductor substrate for use in an integrated circuit, the semiconductor substrate including a channel defined on a surface of the substrate. The channel includes a first wall, a second wall, and a third wall. The first wall is recessed from the surface. The second wall extends from the surface to the first wall. The third wall extends from the surface to the first wall and faces the second wall across the channel. At least one of the second wall and the third wall includes a plurality of structures projecting into the channel from the second wall or the third wall.

Abstract translation: 一种用于集成电路的半导体衬底，所述半导体衬底包括限定在所述衬底的表面上的沟道。 通道包括第一壁，第二壁和第三壁。 第一个墙壁从表面凹陷。 第二壁从表面延伸到第一壁。 第三壁从表面延伸到第一壁并且穿过通道面向第二壁。 第二壁和第三壁中的至少一个包括从第二壁或第三壁突出到通道中的多个结构。

公开(公告)号：US09263366B2

公开(公告)日：2016-02-16

申请号：US14291087

申请日：2014-05-30

Applicant: International Business Machines Corporation

Inventor： Wei Lin ,  Son V. Nguyen ,  Spyridon Skordas ,  Tuan A. Vo

IPC: H01L23/34 ,  H01L23/473 ,  H01L23/467 ,  H01L21/48

CPC classification number: H01L23/473 ,  H01L21/4803 ,  H01L21/481 ,  H01L21/4817 ,  H01L21/4871 ,  H01L23/04 ,  H01L23/06 ,  H01L23/10 ,  H01L23/3675 ,  H01L23/467 ,  H01L25/0655 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor assembly for use with forced liquid and gas cooling. A relatively rigid nano-structure (for example, array of elongated nanowires) extends from an interior surface of a cap toward a top surface of a semiconductor chip, but, because of the rigidness and structural integrity of the nano-structure built into the cap, and of the cap itself, the nano-structure is reliably spaced apart from the top surface of the chip, which helps allow for appropriate cooling fluid flows. The cap piece and nano-structures built into the cap may be made of silicon or silicon compounds.

Abstract translation: 用于强制液体和气体冷却的半导体组件。 相对刚性的纳米结构（例如，细长纳米线的阵列）从帽的内表面朝向半导体芯片的顶表面延伸，但由于内置于盖中的纳米结构的刚性和结构完整性 ，以及盖本身，纳米结构与芯片的顶表面可靠地间隔开，这有助于允许适当的冷却流体流动。 盖子内置的盖片和纳米结构可以由硅或硅化合物制成。

公开(公告)号：US20160005720A1

公开(公告)日：2016-01-07

申请号：US14423693

申请日：2012-09-11

Applicant: Seng-Teong Chang ,  Choon Keat Or ,  Wai-Choo Chai ,  Chong-Tee Ong

Inventor： Seng-Teong Chang ,  Choon Keat Or ,  Wai-Choo Chai ,  Chong-Tee Ong

IPC: H01L25/13 ,  H01L21/48 ,  H01L25/10 ,  H01L33/54 ,  H01L33/62 ,  H01L31/02 ,  H01L33/48 ,  H01L31/0203

CPC classification number: H01L25/13 ,  H01L21/4803 ,  H01L25/0753 ,  H01L25/0756 ,  H01L25/10 ,  H01L31/02002 ,  H01L31/0203 ,  H01L33/486 ,  H01L33/54 ,  H01L33/56 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A method for producing an optoelectronic device is specified. A housing base body is formed with a self-healing polymer material. A recess is found in the housing base body. The recess is confined by a bottom surface and at least one side wall which are formed at least in places by the plastic material of the base body. An optoelectronic semiconductor chip has a first main surface, a second main surface facing away from the first main surface and at least one side surface connecting the first main surface and the second main surface with each other. The optoelectronic semiconductor chip is placed in the recess, so that the first main surface is brought in contact with the bottom surface and the at least one side surface is brought in contact with the at least one side wall.

Abstract translation: 规定了光电器件的制造方法。 壳体基体形成有自修复聚合物材料。 在壳体基体中发现凹陷。 该凹部由底面和至少一个侧壁限制，至少一个侧壁至少由基体的塑料材料形成。 光电子半导体芯片具有第一主表面，远离第一主表面的第二主表面和将第一主表面和第二主表面彼此连接的至少一个侧表面。 将光电子半导体芯片放置在凹部中，使得第一主表面与底表面接触，并且至少一个侧表面与至少一个侧壁接触。