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公开(公告)号:US5324381A
公开(公告)日:1994-06-28
申请号:US56777
申请日:1993-05-04
申请人: Masanori Nishiguchi
发明人: Masanori Nishiguchi
CPC分类号: H01L24/81 , H01L21/681 , H05K13/08 , H01L2224/75 , H01L2224/75743 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/10329 , H01L2924/12042 , H01L2924/3511 , Y10T156/1089 , Y10T29/49131
摘要: The three-dimensional shape of the surface of a board (12) is measured, and the parallel degree between the board (12) and a semiconductor chip (10) is adjusted on the basis of the measurement result. A board mounting means (13) and a semiconductor chip holding means (11) are moved close to each other, and the semiconductor chip (10) is mounted on the board (12).
摘要翻译: 测量板(12)的表面的三维形状,并且基于测量结果来调整板(12)和半导体芯片(10)之间的平行度。 板安装装置(13)和半导体芯片保持装置(11)彼此靠近移动,半导体芯片(10)安装在板(12)上。
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公开(公告)号:US5212880A
公开(公告)日:1993-05-25
申请号:US717015
申请日:1991-06-18
申请人: Masanori Nishiguchi , Atsushi Miki
发明人: Masanori Nishiguchi , Atsushi Miki
CPC分类号: H01L24/81 , H01L21/67144 , H01L21/681 , H01L24/75 , H01L2224/16 , H01L2224/75 , H01L2224/75743 , H01L2224/75822 , H01L2224/81121 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01061 , H01L2924/01074 , H01L2924/12042 , Y10T29/49131 , Y10T29/53091 , Y10T29/53174 , Y10T29/53191
摘要: This invention is directed to an apparatus for packaging a semiconductor flip chip on a substrate by face-down bonding in which coherent light is used to irradiate a bonding head and the substrate, and the light reflected by the bonding head and the substrate form interference patterns. Adjustment of the inclination of the bonding head against the substrate is performed by observation of the interference fringes caused by the interference between the light reflected by the bonding head and the light reflected by the substrate.
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公开(公告)号:US20180019226A1
公开(公告)日:2018-01-18
申请号:US15644379
申请日:2017-07-07
发明人: Masataka MATSUNAGA , Takahiro MASUNAGA , Yasutaka SOMA , Takashi KOGA , Shogo HARA , Masaaki UMITSUKI , Kazutoshi ISHIMARU , Fumio SAKATA
CPC分类号: H01L24/83 , B32B37/025 , B32B41/00 , B32B2457/14 , H01L24/74 , H01L24/75 , H01L24/80 , H01L24/94 , H01L2224/74 , H01L2224/7501 , H01L2224/7525 , H01L2224/75251 , H01L2224/75252 , H01L2224/75501 , H01L2224/75502 , H01L2224/7565 , H01L2224/75701 , H01L2224/75702 , H01L2224/75724 , H01L2224/75725 , H01L2224/75743 , H01L2224/75744 , H01L2224/75745 , H01L2224/75753 , H01L2224/75901 , H01L2224/80009 , H01L2224/80013 , H01L2224/8002 , H01L2224/80123 , H01L2224/80129 , H01L2224/8013 , H01L2224/80132 , H01L2224/80201 , H01L2224/80894 , H01L2224/80908 , H01L2224/83031 , H01L2224/83122 , H01L2224/83896 , H01L2224/94 , H01L2224/80 , H01L2924/00012
摘要: A bonding system includes a substrate transfer device configured to transfer a first substrate and a second substrate to a bonding apparatus, a first holding plate configured to hold the first substrate from an upper surface side, and a second holding plate disposed below the first holding plate and configured to hold the second substrate from a lower surface side so that the second substrate faces the first substrate. The substrate transfer device includes a first holding part capable of holding the first substrate from the upper surface side, and a second holding part disposed below the first holding part and capable of holding the second substrate from the lower surface side. The first holding part and the second holding part are configured to receive and hold the first substrate and the second substrate at the same time from the first holding plate and the second holding plate.
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公开(公告)号:US20170372925A1
公开(公告)日:2017-12-28
申请号:US15680706
申请日:2017-08-18
发明人: Hale Johnson , Gregory George , Aaron Loomis
IPC分类号: H01L21/67 , H01L21/687
CPC分类号: H01L21/67092 , H01L21/6719 , H01L21/67742 , H01L21/67748 , H01L21/6838 , H01L21/68707 , H01L21/68721 , H01L21/68728 , H01L21/68742 , H01L21/68771 , H01L24/08 , H01L24/75 , H01L24/80 , H01L24/94 , H01L2224/08145 , H01L2224/75101 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75305 , H01L2224/7531 , H01L2224/75312 , H01L2224/7565 , H01L2224/757 , H01L2224/75701 , H01L2224/75702 , H01L2224/75703 , H01L2224/75743 , H01L2224/75754 , H01L2224/80203 , H01L2224/80907 , H01L2224/94 , H01L2924/00012 , H01L2224/80 , H01L2924/00014
摘要: An industrial-scale system and method for handling precisely aligned and centered semiconductor substrate (e.g., wafer) pairs for substrate-to-substrate (e.g., wafer-to-wafer) aligning and bonding applications is provided. Some embodiments include an aligned substrate transport device having a frame member and a spacer assembly. The centered semiconductor substrate pairs may be positioned within a processing system using the aligned substrate transport device, optionally under robotic control. The centered semiconductor substrate pairs may be bonded together without the presence of the aligned substrate transport device in the bonding device. The bonding device may include a second spacer assembly which operates in concert with that of the aligned substrate transport device to perform a spacer hand-off between the substrates. A pin apparatus may be used to stake the substrates during the hand-off.
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公开(公告)号:US09728519B2
公开(公告)日:2017-08-08
申请号:US14710070
申请日:2015-05-12
发明人: Yoichiro Kurita
CPC分类号: H01L24/97 , H01L21/02076 , H01L21/67132 , H01L24/75 , H01L24/83 , H01L2224/7525 , H01L2224/753 , H01L2224/7555 , H01L2224/756 , H01L2224/75743 , H01L2224/759 , H01L2224/83104 , H01L2224/832 , H01L2224/838 , H01L2224/97 , H01L2924/05442 , H01L2924/10253 , H01L2924/1032
摘要: According to one embodiment, there is provided a bonding method of a semiconductor chip. The bonding method includes arranging an activated front surface of a semiconductor chip and an activated front surface of a substrate so as to face each other with a back surface of the semiconductor chip attached to a sheet. The bonding method includes pushing the back surface of the semiconductor chip through the sheet to closely attach the activated front surface of the semiconductor chip and the activated front surface of the substrate. The bonding method includes stripping the sheet from the back surface of the semiconductor chip while maintaining a state in which the activated front surface of the semiconductor chip is closely attached to the activated front surface of the substrate.
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公开(公告)号:US09640418B2
公开(公告)日:2017-05-02
申请号:US15150856
申请日:2016-05-10
发明人: Hale Johnson , Gregory George
IPC分类号: H01L21/67 , H01L21/677 , H01L21/687 , H01L21/683 , H01L23/00
CPC分类号: H01L21/67742 , H01L21/67092 , H01L21/6719 , H01L21/67748 , H01L21/6838 , H01L21/68707 , H01L21/68721 , H01L21/68742 , H01L24/08 , H01L24/75 , H01L24/80 , H01L24/83 , H01L24/94 , H01L2224/08145 , H01L2224/75101 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75305 , H01L2224/7531 , H01L2224/75312 , H01L2224/7565 , H01L2224/757 , H01L2224/75701 , H01L2224/75702 , H01L2224/75703 , H01L2224/75743 , H01L2224/75754 , H01L2224/80203 , H01L2224/80907 , H01L2224/94 , H01L2924/00012 , H01L2224/80 , H01L2924/00014
摘要: An industrial-scale apparatus, system, and method for handling precisely aligned and centered semiconductor wafer pairs for wafer-to-wafer aligning and bonding applications includes an end effector having a frame member and a floating carrier connected to the frame member with a gap formed therebetween, wherein the floating carrier has a semi-circular interior perimeter. The centered semiconductor wafer pairs are positionable within a processing system using the end effector under robotic control. The centered semiconductor wafer pairs are bonded together without the presence of the end effector in the bonding device.
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公开(公告)号:US09633978B2
公开(公告)日:2017-04-25
申请号:US14567056
申请日:2014-12-11
发明人: Shota Miki
IPC分类号: H01L25/065 , H01L25/00 , H05K3/36 , H01L21/56 , H01L23/31 , H01L23/18 , H05K3/34 , H01L23/367 , H01L23/00
CPC分类号: H01L25/0657 , H01L21/563 , H01L23/3121 , H01L23/367 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/50 , H01L2224/0401 , H01L2224/13022 , H01L2224/13024 , H01L2224/13025 , H01L2224/13082 , H01L2224/14181 , H01L2224/16146 , H01L2224/16148 , H01L2224/16235 , H01L2224/16238 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/75743 , H01L2224/81005 , H01L2224/81191 , H01L2224/81193 , H01L2224/81815 , H01L2224/83191 , H01L2224/83192 , H01L2224/92125 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/10253 , H01L2924/1432 , H01L2924/15311 , H01L2924/157 , H05K3/3436 , H05K3/368 , H05K2201/041 , H05K2201/10977
摘要: A semiconductor device includes a wiring substrate, a first semiconductor chip flip-chip connected to the wiring substrate, a first underfill resin filled between the wiring substrate and the first semiconductor chip, the first underfill resin including a pedestal portion arranged in a periphery of the first semiconductor chip, a second semiconductor chip flip-chip connected to the first semiconductor chip, and being larger in area than the first semiconductor chip, and a second underfill resin filled between the first semiconductor chip and the second semiconductor chip, the second underfill resin covering an upper face of the pedestal portion of the first underfill resin and a side face of the second semiconductor chip.
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公开(公告)号:US20160056124A1
公开(公告)日:2016-02-25
申请号:US14929326
申请日:2015-10-31
发明人: Nobuyasu Muto
IPC分类号: H01L25/065 , H01L23/31 , H01L23/04 , H01L23/498
CPC分类号: H01L25/0652 , H01L21/6836 , H01L21/78 , H01L23/04 , H01L23/3142 , H01L23/49811 , H01L23/49838 , H01L24/03 , H01L24/27 , H01L24/29 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68322 , H01L2221/68327 , H01L2224/04042 , H01L2224/27436 , H01L2224/2919 , H01L2224/32145 , H01L2224/32245 , H01L2224/43 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/48257 , H01L2224/48471 , H01L2224/48479 , H01L2224/4911 , H01L2224/49111 , H01L2224/49175 , H01L2224/49429 , H01L2224/73265 , H01L2224/75743 , H01L2224/78 , H01L2224/78301 , H01L2224/83191 , H01L2224/838 , H01L2224/85001 , H01L2224/85051 , H01L2224/85148 , H01L2224/85205 , H01L2224/85986 , H01L2224/92247 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/12042 , H01L2924/181 , H01L2924/1815 , H01L2924/30105 , H01L2224/85186 , H01L2924/00 , H01L2224/48227 , H01L2924/3512 , H01L2924/00012 , H01L2224/32225 , H01L2224/4554
摘要: Chip cracking that occurs when a dicing step using a blade is carried out to acquire semiconductor chips with the reduced thickness of a semiconductor wafer is suppressed. When the semiconductor wafer is cut at the dicing step for the semiconductor wafer, a blade is advanced as follows: in dicing in a first direction (Y-direction in FIG. 12) along a first straight line, the blade is advanced from a first point to a second point. The first point is positioned in a first portion and the second point is opposed to the first point with a second straight line running through the center point of the semiconductor wafer in between.
摘要翻译: 进行使用叶片的切割步骤进行以获得半导体晶片的厚度减小的半导体芯片时发生的切屑破裂。 当在半导体晶片的切割步骤中切割半导体晶片时,刀片如下进行:沿着第一直线在第一方向(图12中的Y方向)的切割中,刀片从第一直线 指向第二点。 第一点位于第一部分中,第二点与第一点相对,第二点与穿过其间的半导体晶片的中心点的第二直线相对。
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公开(公告)号:US20140127860A1
公开(公告)日:2014-05-08
申请号:US14150972
申请日:2014-01-09
发明人: Nobuyasu MUTO
IPC分类号: H01L23/00
CPC分类号: H01L25/0652 , H01L21/6836 , H01L21/78 , H01L23/04 , H01L23/3142 , H01L23/49811 , H01L23/49838 , H01L24/03 , H01L24/27 , H01L24/29 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68322 , H01L2221/68327 , H01L2224/04042 , H01L2224/27436 , H01L2224/2919 , H01L2224/32145 , H01L2224/32245 , H01L2224/43 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/48257 , H01L2224/48471 , H01L2224/48479 , H01L2224/4911 , H01L2224/49111 , H01L2224/49175 , H01L2224/49429 , H01L2224/73265 , H01L2224/75743 , H01L2224/78 , H01L2224/78301 , H01L2224/83191 , H01L2224/838 , H01L2224/85001 , H01L2224/85051 , H01L2224/85148 , H01L2224/85205 , H01L2224/85986 , H01L2224/92247 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/12042 , H01L2924/181 , H01L2924/1815 , H01L2924/30105 , H01L2224/85186 , H01L2924/00 , H01L2224/48227 , H01L2924/3512 , H01L2924/00012 , H01L2224/32225 , H01L2224/4554
摘要: Chip cracking that occurs when a dicing step using a blade is carried out to acquire semiconductor chips with the reduced thickness of a semiconductor wafer is suppressed. When the semiconductor wafer is cut at the dicing step for the semiconductor wafer, a blade is advanced as follows: in dicing in a first direction (Y-direction in FIG. 12) along a first straight line, the blade is advanced from a first point to a second point. The first point is positioned in a first portion and the second point is opposed to the first point with a second straight line running through the center point of the semiconductor wafer in between.
摘要翻译: 进行使用叶片的切割步骤进行以获得半导体晶片的厚度减小的半导体芯片时发生的切屑破裂。 当在半导体晶片的切割步骤中切割半导体晶片时,刀片如下进行:沿着第一直线在第一方向(图12中的Y方向)的切割中,刀片从第一直线 指向第二点。 第一点位于第一部分中,第二点与第一点相对,第二点与穿过其间的半导体晶片的中心点的第二直线相对。
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公开(公告)号:US08710651B2
公开(公告)日:2014-04-29
申请号:US12904680
申请日:2010-10-14
申请人: Kenji Sakata , Tsuyoshi Kida
发明人: Kenji Sakata , Tsuyoshi Kida
IPC分类号: H01L29/66
CPC分类号: H01L21/563 , H01L23/3135 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49173 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/75743 , H01L2224/81191 , H01L2224/81203 , H01L2224/81801 , H01L2224/83102 , H01L2224/83104 , H01L2224/83192 , H01L2224/83951 , H01L2224/92125 , H01L2225/0651 , H01L2225/06517 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/3511 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/3512
摘要: A semiconductor device includes a substrate, a semiconductor chip that is bonded to one of the faces of the substrate via bumps, and has a device formation face facing the one of the faces, and a resin that fills the space between the device formation face of the semiconductor chip and the one of the faces of the substrate. The resin includes: a first resin that is formed in a formation region of bumps placed on the outermost circumference of the bumps, and is formed inside the formation region, and a second resin that is formed outside the first resin. The thermal expansion coefficient of the substrate is higher than the thermal expansion coefficient of the first resin. The thermal expansion coefficient of the second resin is higher than the thermal expansion coefficient of the first resin.
摘要翻译: 半导体器件包括:衬底,通过凸块接合到衬底的一个面的半导体芯片,并且具有面向该一个面的器件形成面;以及树脂,其填充器件形成面之间的空间 半导体芯片和基板的一个面。 树脂包括:第一树脂,其形成在凸起的最外周上的凸起的形成区域中,并且形成在形成区域内部;以及第二树脂,形成在第一树脂的外部。 基板的热膨胀系数高于第一树脂的热膨胀系数。 第二树脂的热膨胀系数高于第一树脂的热膨胀系数。
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