公开(公告)号：US06800814B2

公开(公告)日：2004-10-05

申请号：US10046163

申请日：2002-01-16

申请人： Tohru Ohsaka

发明人： Tohru Ohsaka

IPC分类号： H05K103

CPC分类号： H05K1/0216 ,  H05K2201/09336 ,  H05K2201/09345 ,  H05K2201/09354

摘要： A multi-layered printed wiring board capable of securing required wiring density even with a decreased number of wiring layers and reducing radiation noises. The multi-layered printed wiring board has at least three wiring layers each at least having at least one power supply line or a ground line, and another kind of line, said wiring layers each having an outer edge. A ground line is formed at the outer edge of at least one of the wiring layers. A basic power supply line is formed inside the ground line. At least one power supply line extends from the basic power supply line. A plurality of electronic parts are mounted on at least one of the wiring layers. The at least one power supply line is wired to mounting positions of the electronic parts via at least one of the wiring layers.

摘要翻译： 一种多层印刷电路板，即使在布线层数量减少并且减少辐射噪声的情况下也能够确保所需的布线密度。 多层印刷电路板具有至少三个布线层，每个布线层至少具有至少一个电源线或接地线，并且另一种线，所述布线层各自具有外边缘。 在至少一个布线层的外边缘处形成接地线。 在地线内形成基本电源线。 至少一条电源线从基本电源线延伸。 多个电子部件安装在至少一个布线层上。 所述至少一个电源线经由所述布线层中的至少一个布线到所述电子部件的安装位置。

公开(公告)号：US06787706B2

公开(公告)日：2004-09-07

申请号：US10079300

申请日：2002-02-19

申请人： Tetsuo Hirakawa

发明人： Tetsuo Hirakawa

IPC分类号： H05K103

CPC分类号： H05K1/0263 ,  H01L23/49861 ,  H01L23/538 ,  H01L2224/32225 ,  H01L2924/1305 ,  H01L2924/13055 ,  H05K1/0306 ,  H05K3/4015 ,  H05K2201/1028 ,  H01L2924/00

摘要： A ceramic circuit board that protects a metallized wiring layer from fusion when a large electric current is applied thereto. The ceramic circuit board includes a ceramic substrate, a plurality of metallized wiring layers formed on the ceramic substrate, and a metal circuit plate made of copper, which is attached to part of the metallized wiring layers. The condition, S≧6×10−5i2, is fulfilled in the ceramic circuit board, whereby S (mm2) is the sectional area of the metal circuit plate and i (A) the value of a flowing electric current.

摘要翻译： 陶瓷电路板，其在施加大电流时保护金属化布线层不熔化。 陶瓷电路板包括陶瓷基板，形成在陶瓷基板上的多个金属化布线层和连接到金属化布线层的一部分的由铜制成的金属电路板。 在陶瓷电路板中满足条件S> = 6×10 -5 i 2，由此S（mm 2）是金属电路板的截面面积，i（A）a 流动电流。

公开(公告)号：US06710256B2

公开(公告)日：2004-03-23

申请号：US09957432

申请日：2001-09-20

申请人： Kenichi Kato ,  Hiroaki Ugawa ,  Toshiki Kita

发明人： Kenichi Kato ,  Hiroaki Ugawa ,  Toshiki Kita

IPC分类号： H05K103

CPC分类号： H01R12/62 ,  H01R13/2414 ,  H05K1/0219 ,  H05K3/365 ,  H05K3/368 ,  H05K2201/056 ,  H05K2201/2018

摘要： An apparatus and a method for connecting high-frequency circuit boards, and for providing an electrical connection between respective electrodes of two high-frequency circuit boards includes an electrode connecting member including a bar-shaped member having a predetermined sectional shape, and having connecting electrodes formed on a part of an outer periphery of the bar-shaped member. The connecting electrodes are located so as to provide an inter-connection between the respective electrodes of the two high-frequency circuit boards through the connecting electrodes and to be sandwiched between the respective electrodes thereof. The connecting electrodes are preferably composed of a plurality of electrode lines formed so as to be spaced at a predetermined interval on the outer periphery of the bar-shaped member.

摘要翻译： 一种用于连接高频电路板并且用于在两个高频电路板的各个电极之间提供电连接的装置和方法包括：电极连接构件，其包括具有预定截面形状的棒状构件，并具有连接电极 形成在棒状构件的外周的一部分上。 连接电极被定位成通过连接电极提供两个高频电路板的各个电极之间的相互连接，并且夹在其各自的电极之间。 连接电极优选由在棒状部件的外周隔开规定间隔而形成的多个电极线构成。

公开(公告)号：US06710255B2

公开(公告)日：2004-03-23

申请号：US09822715

申请日：2001-03-30

申请人： Jason Ross ,  Timothy J. Maloney

发明人： Jason Ross ,  Timothy J. Maloney

IPC分类号： H05K103

CPC分类号： H05K1/0228 ,  H05K1/0237 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/09672

摘要： A first signal path is connected to a first plane via a plated hole. A first metal flood is connected to the plated hole to form a first plate. A second signal path is on a second plane. A second metal flood connected to the second signal path to form a second plate above the first plate.

摘要翻译： 第一信号路径经由电镀孔连接到第一平面。 第一金属淹水连接到电镀孔以形成第一板。 第二信号路径在第二平面上。 连接到第二信号路径的第二金属淹水以在第一板上方形成第二板。

公开(公告)号：US06664480B2

公开(公告)日：2003-12-16

申请号：US09865336

申请日：2001-05-25

申请人： Zane Drussel ,  Derek Hinkle

发明人： Zane Drussel ,  Derek Hinkle

IPC分类号： H05K103

CPC分类号： H01L23/13 ,  H01L21/481 ,  H01L2924/0002 ,  H05K3/0052 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2203/0195 ,  H05K2203/1536 ,  H05K2203/1545 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49135 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49789 ,  Y10T29/49794 ,  Y10T83/0505 ,  H01L2924/00

摘要： A circuit board substrate assembly includes a generally planar circuit board substrate material having a longitudinal axis extending along a length of the substrate material between a first end and a second end thereof. The circuit board substrate material further has a first edge and a second edge extending along the length of the circuit board substrate material between the first end and the second end. A plurality of openings are defined in the substrate material. Each opening extends between a first distance from the first edge of the circuit board substrate and a second distance from the second edge of the circuit board substrate. Further, each opening separates adjacent circuit forming regions lying along the longitudinal axis and has first and second opposing end portions. The first end portions of each opening lie along a first singulation axis of the substrate material parallel to the longitudinal axis and the second end portions of each opening lie along a second singulation axis of the substrate material parallel to the longitudinal axis. Removing interconnect material along the first singulation axis and second singulation axis provide for singulation of the circuit forming regions and any circuits thereof.

公开(公告)号：US06639154B1

公开(公告)日：2003-10-28

申请号：US09685306

申请日：2000-10-10

申请人： Marc Cartier ,  Mark Gailus

发明人： Marc Cartier ,  Mark Gailus

IPC分类号： H05K103

CPC分类号： H05K1/0222 ,  H01R12/718 ,  H01R24/50 ,  H01R2103/00 ,  H05K3/3447 ,  H05K2201/09618 ,  H05K2201/09809 ,  H05K2201/10189 ,  H05K2201/10303

摘要： A circuit board includes (i) a section of circuit board material having a signal conductor, a ground conductor, and dielectric material that separates the signal conductor and the ground conductor, and (ii) a signal launch. The signal launch includes a signal via that contacts the signal conductor and the dielectric material of the section of circuit board material, a first set of ground vias and a second set of ground vias. The ground vias contact the ground conductor and the dielectric material of the section of circuit board material. The first set of ground vias is disposed a first radial distance from the signal via. The second set of ground vias is disposed a second radial distance from the signal via. A coaxial connector mounts to the signal launch of the circuit board in order to provide electrical access to the signal and ground conductors.

摘要翻译： 电路板包括（i）具有分离信号导体和接地导体的信号导体，接地导体和介电材料的电路板材料的一部分，以及（ii）信号发射。 信号发射包括接触信号导体和电路板材料部分的介电材料的信号通路，第一组接地通孔和第二组接地通路。 接地导体与接地导体和电路板材料部分的介电材料接触。 第一组接地通孔设置在与信号通孔相距的第一径向距离处。 第二组接地通孔设置在与信号通孔相距的第二径向距离处。 同轴连接器安装到电路板的信号发射，以便提供对信号和接地导体的电接入。

公开(公告)号：US06541709B1

公开(公告)日：2003-04-01

申请号：US08743405

申请日：1996-11-01

申请人： Peter A. Franklin ,  Arthur G. Merryman ,  Rajesh S. Patel ,  Thomas A. Wassick

发明人： Peter A. Franklin ,  Arthur G. Merryman ,  Rajesh S. Patel ,  Thomas A. Wassick

IPC分类号： H05K103

CPC分类号： H01L21/485 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5382 ,  H01L2924/0002 ,  H05K3/225 ,  Y10T29/49126 ,  Y10T29/49165 ,  H01L2924/00

摘要： A multilayer thin film structure having defined strap repair lines thereon and a method for repairing interconnections in the multilayer thin film structure (MLTF) and/or making engineering changes (EC) are provided. The method determines interconnection defects in the MLTF at a thin film layer adjacent the top metal layer of the structure, defines the top surface metallization including a series of orthogonal X conductor lines and Y conductor lines using photoresist and lithography and additive or subtractive metallization techniques and then uses a phototool to selectively expose the photoresist to define top surface strap connections needed to repair the interconnections and/or make EC's, and forms the top surface metallization.

摘要翻译： 提供了具有限定的带修复线的多层薄膜结构和用于修复多层薄膜结构（MLTF）中的互连和/或进行工程变化（EC）的方法。 该方法确定在与结构顶层金属层相邻的薄膜层处的MLTF中的互连缺陷，限定顶表面金属化，其包括使用光致抗蚀剂和光刻以及添加或减色金属化技术的一系列正交X导体线和Y导线， 然后使用光学工具选择性地暴露光致抗蚀剂以限定修复互连和/或制造EC所需的顶表面带连接并形成顶表面金属化。

公开(公告)号：US06521843B1

公开(公告)日：2003-02-18

申请号：US09304631

申请日：1999-05-04

申请人： Kenji Kohya

发明人： Kenji Kohya

IPC分类号： H05K103

CPC分类号： H05K1/0216 ,  H05K1/0298 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/09336 ,  H05K2201/09627 ,  H05K2201/09845

摘要： A multilayer printed circuit board enables needless electro-magnetic radiation to be suppressed. Interlayer insulation materials are arranged in layer-built constitution between respective layers of a mixed wiring layer of a first signal and/or a power supply wiring, a first ground layer, a second ground layer, and a mixed wiring layer of a second signal and/or a power supply wiring. A through-hole for connecting the ground layers with each other is provided adjacently to a through-hole for connecting the signal and/or the power supply between these layers. According to the constitution, a return circuit current route of the signal and the power supply to the ground layers is secured. As a result, a loop made by the current becomes small, thus needless radiation of electro-magnetic wave is capable of being suppressed.

摘要翻译： 多层印刷电路板能够抑制不必要的电磁辐射。 层间绝缘材料以第一信号和/或电源布线，第一接地层，第二接地层和第二信号的混合布线层的混合布线层的各层之间的层间构造布置，并且 /或电源接线。 用于连接接地层的通孔相邻设置用于连接这些层之间的信号和/或电源的通孔。 根据该结构，确保信号的回路电流路径和对地层的电力供应。 结果，由电流产生的环路变小，因此能够抑制电磁波的不必要的辐射。

公开(公告)号：US06518508B2

公开(公告)日：2003-02-11

申请号：US09878341

申请日：2001-06-12

申请人： Se-Chul Park ,  Nam-seog Kim

发明人： Se-Chul Park ,  Nam-seog Kim

IPC分类号： H05K103

CPC分类号： H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/48639 ,  H01L2224/48664 ,  H01L2224/48839 ,  H01L2224/48864 ,  H01L2224/85439 ,  H01L2224/85464 ,  H01L2924/01015 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  Y10T428/24917 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/20753

摘要： A lead frame for a semiconductor package includes a base metal layer made of copper (Cu), Cu alloy or iron-nickel (Fe-Ni) alloy, an underlying plating layer formed on at least one surface of the base metal layer and made of Ni or Ni alloy, an intermediate plating layer formed on the underlying plating layer to a thickness of about 0.00025 to about 0.1 &mgr;m (about 0.1 to about 4 microinches) and made of palladium (Pd) or Pd alloy, and an outer plating layer formed in the intermediate plating layer to a thickness of about 0.05 to about 0.75 &mgr;m (about 2 to 30 microinches) and made of silver (Ag) or Ag alloy. Since an Ag plated layer is formed as the outer plating layer, excellent oxidation resistance and corrosion resistance can be exhibited even under a high-temperature thermal condition, thereby improving wire bondability, solderability and good adhesion with epoxy for use in the semiconductor package, and preventing heel crack at a wire bonding portion. In particular, since thin layers of the Pd plated layer and Ag plated layer are used, Ag migration can be prevented. Also, the amount of a noble metal such as Pd or Ag can be greatly reduced, thereby attaining thin-film, light-weight semiconductor packages.

公开(公告)号：US06512182B2

公开(公告)日：2003-01-28

申请号：US10086428

申请日：2002-03-04

申请人： Hiroki Takeuchi ,  Toshifumi Kojima ,  Kazushige Obayashi

发明人： Hiroki Takeuchi ,  Toshifumi Kojima ,  Kazushige Obayashi

IPC分类号： H05K103

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L23/49822 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T428/24917 ,  Y10T428/249996 ,  H01L2924/00 ,  H01L2224/05599

摘要： The invention relates to a wiring circuit board including an electronic device disposed in a hole of the wiring circuit board; a resin filling the hole such that the electronic device is embedded in the resin; a wiring layer formed on the resin; and an interface between the resin and the wiring layer. This interface has a roughness in a range of 2-6 &mgr;m in terms of ten-point mean roughness.