Fairness algorithm for full-duplex buffer insertion ring
    41.
    发明授权
    Fairness algorithm for full-duplex buffer insertion ring 失效
    全双工缓冲插入环的公平算法

    公开(公告)号:US4926418A

    公开(公告)日:1990-05-15

    申请号:US336364

    申请日:1989-04-11

    IPC分类号: H04L12/433 H04L12/56

    CPC分类号: H04L47/10 H04L12/433

    摘要: The invention describes a method for transmitting data on a full-duplex buffer insertion ring. Access to the ring by each node is regulated by circulating control message around the ring. The message indicated to each node the maximum number of packets that it may transmit during the interval from the reception of one control message to the forwarding of a subsequent control message. With this invention a station need not be in possession of the control message in order to transmit a packet. A node will also hold a control message if it has not transmitted a predetermined minimum number of packets in its output buffer in a given time interval.