公开(公告)号：US06566017B1

公开(公告)日：2003-05-20

申请号：US09638488

申请日：2000-08-14

申请人： Jeng-Horng Chen ,  Shi-Jay Lin

发明人： Jeng-Horng Chen ,  Shi-Jay Lin

IPC分类号： G03F900

CPC分类号： G03F1/38 ,  G03F1/80

摘要： A mask used to image circuit patterns onto a semiconductor wafer exhibits improved uniformity of critical feature dimensions. A pattern of dummy features is formed around the outer periphery of the main pattern field during manufacture of the mask. The presence of the dummy field eliminates loading of the etch rate at the marginal areas of the main pattern field, thereby assuring that all of the features in the main pattern field are etched at substantially the same rate. The dummy field pattern is covered by an opaque layer of material after etching of the mask in order to prevent the dummy features from being imaged onto the wafer.

摘要翻译： 用于将电路图案成像到半导体晶片上的掩模表现出改进的关键特征尺寸的均匀性。 在制造掩模期间，在主图案场的外周围形成虚拟特征图案。 伪场的存在消除了在主图案场的边缘区域处的蚀刻速率的加载，从而确保主图案场中的所有特征以基本相同的速率被蚀刻。 在蚀刻掩模之后，伪场图案被不透明的材料层覆盖，以防止虚拟特征被成像到晶片上。