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    General charging method
    41.
    发明授权
    General charging method 有权
    一般充电方式

    公开(公告)号：US07590228B2

    公开(公告)日：2009-09-15

    申请号：US11979772

    申请日：2007-11-08

    申请人： Zhijian Lu ,  Xin Zhang ,  Xiaozheng Guo ,  Qingchen Chu ,  Youkun Chen

    发明人： Zhijian Lu ,  Xin Zhang ,  Xiaozheng Guo ,  Qingchen Chu ,  Youkun Chen

    IPC分类号： H04M15/00

    CPC分类号： H04L12/14 ,  G06Q30/0284 ,  G06Q30/04 ,  G06Q50/188

    摘要： A general charging method includes establishing a charging strategy and performing the charging according to the charging strategy. The charging strategy includes at least one priority each of which includes at least one time period and each of the time periods is provided at least one rate segment in each of which there is at least one rate. Performing the charging includes: matching with a corresponding charging strategy upon the time a subscriber uses a service and/or the subscriber's current resource, and determining a charging mode; searching for a corresponding priority; performing the charging according to the charging mode. With such a structure of general charging strategy, the method can satisfy various charging demands and provide generality and adequate expansibility. Also, the method enables subscribers to configure different charging methods as necessary.

    摘要翻译： 一般的收费方法包括建立收费策略，并根据收费策略进行收费。 所述计费策略包括至少一个优先级，每个优先级至少包括至少一个时间段，并且每个所述时间段被提供至少一个速率段，每个速率段中至少有一个速率。 执行计费包括：在用户使用服务和/或用户当前资源时与相应的计费策略相匹配，并确定计费模式; 搜索相应的优先级; 根据充电模式进行充电。 通过这种一般收费策略的结构，该方法可以满足各种收费需求，提供一般性和充分的扩展性。 此外，该方法使订户能够根据需要配置不同的计费方法。

    Method for Reduction of Resist Poisoning in Via-First Trench-Last Dual Damascene Process
    42.
    发明申请
    Method for Reduction of Resist Poisoning in Via-First Trench-Last Dual Damascene Process 审中-公开
    通过第一次沟槽 - 最后的双镶嵌工艺减少抗蚀剂中毒的方法

    公开(公告)号：US20090085120A1

    公开(公告)日：2009-04-02

    申请号：US11863448

    申请日：2007-09-28

    申请人： Zhijian Lu ,  Tae S. Kim

    发明人： Zhijian Lu ,  Tae S. Kim

    IPC分类号： H01L21/768 ,  H01L21/8234 ,  H01L27/088

    CPC分类号： H01L21/7684 ,  H01L21/31144 ,  H01L21/76813 ,  H01L21/76816 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Fabrication of interconnects in integrated circuits (ICs) use low-k dielectric materials, nitrogen containing dielectric materials, copper metal lines, dual damascene processing and amplified photoresists to build features smaller than 100 nm. Regions of an IC with low via density are subject to nitrogen diffusion from nitrogen containing dielectric materials into low-k dielectric material, and subsequent interference with forming patterns in amplified photoresists, a phenomenon known as resist poisoning, which results in defective interconnects. Attempts to solve this problem cause lower IC circuit performance or higher fabrication process cost and complexity. This invention comprises a dummy via and a method of placing dummy vias in a manner that reduces resist poisoning without impairing circuit performance or increasing fabrication process cost or complexity.

    摘要翻译： 集成电路（IC）中互连的制造使用低k电介质材料，含氮介电材料，铜金属线，双镶嵌处理​​和放大光致抗蚀剂，以构建小于100nm的特征。 具有低通孔密度的IC的区域经受从含氮介电材料的氮扩散到低k电介质材料中，并且随后在放大的光致抗蚀剂中形成图案的干扰，这被称为抗蚀剂中毒，这导致不良互连。 解决这个问题的尝试导致IC电路性能降低或者制造工艺成本和复杂性更高。 本发明包括虚拟通孔和以减少抗蚀剂中毒而不损害电路性能或增加制造工艺成本或复杂性的方式放置虚拟通孔的方法。

    General charging method
    43.
    发明授权
    General charging method 有权
    一般充电方式

    公开(公告)号：US07313230B2

    公开(公告)日：2007-12-25

    申请号：US10558620

    申请日：2003-12-31

    申请人： Zhijian Lu ,  Xin Zhang ,  Xiaozheng Guo ,  Qingchen Chu ,  Youkun Chen

    发明人： Zhijian Lu ,  Xin Zhang ,  Xiaozheng Guo ,  Qingchen Chu ,  Youkun Chen

    IPC分类号： H04M15/00

    CPC分类号： H04L12/14 ,  G06Q30/0284 ,  G06Q30/04 ,  G06Q50/188

    摘要： The present invention provides a general charging method applicable to a charging system in the communication field, comprising steps of establishing a charging strategy and performing the charging based upon the charging strategy. The charging strategy comprises a plurality of priorities each of which comprises a plurality of periods of time, and each of the periods of time corresponds to a type of rate segmentation and is provided a plurality of rate segments in each of which there are a plurality of rates. The step of performing the charging comprises steps of: searching for the highest priority in the charging strategy; searching for a corresponding period of time in the priority based upon the time a subscriber uses a service, and if found, performing the charging based upon the rate segments in the period of time; when the charging has been completed or the priorities have been searched through, and if there is any usage quantity that can't be charged, recording it and terminating the charging. With such a structure of general charging strategy, the present invention can satisfy various charging demands and provide generality and adequate expansibility. Also, the present invention enables subscribers to configure different charging methods as needed.

    摘要翻译： 本发明提供了一种适用于通信领域中的计费系统的通用计费方法，其特征在于包括基于计费策略建立计费策略和执行计费的步骤。 充电策略包括多个优先级，每个优先级包括多个时间段，并且时间段中的每个时间段对应于速率分段的类型，并且被提供多个速率段，每个速率段中有多个速率段 价格。 执行充电的步骤包括以下步骤：在充电策略中搜索最高优先级; 基于用户使用服务的时间，优先搜索相应的时间段，并且如果发现，则在该时间段内基于速率段执行计费; 当充电已经完成或已经搜索到优先级，并且如果存在不能充电的任何使用量，记录并终止充电。 通过这种一般充电策略的结构，本发明可以满足各种充电需求，并提供通用性和充分的可扩展性。 而且，本发明使订户能够根据需要配置不同的计费方法。

    Viewing screens including carbon materials and methods of using
    44.
    发明申请
    Viewing screens including carbon materials and methods of using 审中-公开
    查看包括碳材料和使用方法的屏幕

    公开(公告)号：US20060126175A1

    公开(公告)日：2006-06-15

    申请号：US11212905

    申请日：2005-08-29

    申请人： Zhijian Lu ,  Ilyas Khayrullin

    发明人： Zhijian Lu ,  Ilyas Khayrullin

    IPC分类号： G03B21/56

    CPC分类号： G03B21/56

    摘要： Viewing screens having highly light absorptive carbon nanotubes, fullerenes and/or fullerides dispersed in a resinous or polymeric material as part of the light absorbing material located between the light transmission apertures. The highly light absorptive composite of carbon nanotubes, fullerenes and/or fullerides and polymeric material may be conductive. A voltage potential having DC and/or AC components or a ground potential may be applied to the surface of the viewing screen. Such a potential may be selected such that it prevents or reduces the build-up of dust on the viewing screen.

    摘要翻译： 观察具有分散在树脂或聚合材料中的高吸收性碳纳米管，富勒烯和/或富勒烯的屏幕，作为位于光透射孔之间的光吸收材料的一部分。 碳纳米管，富勒烯和/或富勒烯和高分子材料的高光吸收复合材料可能是导电的。 可以将具有DC和/或AC分量或接地电位的电压电位施加到观察屏的表面。 可以选择这样的电位，使得其可以防止或减少观察屏幕上灰尘的积聚。

    Producing low k inter-layer dielectric films using Si-containing resists
    46.
    发明授权
    Producing low k inter-layer dielectric films using Si-containing resists 失效
    使用含Si抗蚀剂生产低k层间介电膜

    公开(公告)号：US06989230B2

    公开(公告)日：2006-01-24

    申请号：US10108359

    申请日：2002-03-29

    申请人： Zhijian Lu

    发明人： Zhijian Lu

    IPC分类号： G03F7/00 ,  G03F7/36

    CPC分类号： H01L21/02126 ,  H01L21/02203 ,  H01L21/02304 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02343 ,  H01L21/31058 ,  H01L21/31144 ,  H01L21/31695 ,  H01L21/76802 ,  H01L21/7682 ,  H01L2221/1047

    摘要： In a process of producing low k inter-layer dielectric film in an interconnect structure on a semiconductor body, the improvement of preventing resist poisoning effects, comprising: a) providing an interconnect structure comprising a substrate and metal line on a semiconductor body; b) depositing an antireflective (ARC) coating layer over the substrate and metal line; c) depositing a Si-containing resist coating on the ARC layer; d) affecting photolithography to provide a contact hole in the Si-containing resist coating; e) affecting silylation to obtain a Si-rich film by increasing Si content in the resist coating; f) subjecting the Si-rich film to oxidation to convert it to a low k oxide porous dielectric film; and g) affecting an ARC opening by removing the ARC coating in the contact hole.

    摘要翻译： 在制造半导体本体上的互连结构中的低k层间电介质膜的过程中，防止抗蚀剂中毒效果的改进包括：a）在半导体本体上提供包括衬底和金属线的互连结构; b）在衬底和金属线上沉积抗反射（ARC）涂层; c）在ARC层上沉积含Si的抗蚀涂层; d）影响光刻以在含Si抗蚀剂涂层中提供接触孔; e）通过增加抗蚀剂涂层中的Si含量来影响甲硅烷基化以获得富Si薄膜; f）使富Si薄膜氧化以将其转化为低k氧化物多孔介电膜; 并且g）通过去除接触孔中的ARC涂层来影响ARC开口。

    Extraction of impurities in a semiconductor process with a supercritical fluid
    47.
    发明申请
    Extraction of impurities in a semiconductor process with a supercritical fluid 审中-公开
    用超临界流体萃取半导体工艺中的杂质

    公开(公告)号：US20050241672A1

    公开(公告)日：2005-11-03

    申请号：US10917772

    申请日：2004-08-13

    申请人： Phillip Matz ,  Sameer Ajmera ,  Ju-Ai Ruan ,  Jinyoung Kim ,  Zhijian Lu ,  Laura Matz

    发明人： Phillip Matz ,  Sameer Ajmera ,  Ju-Ai Ruan ,  Jinyoung Kim ,  Zhijian Lu ,  Laura Matz

    IPC分类号： B08B6/00 ,  B08B7/00 ,  H01L21/02 ,  H01L21/3105

    CPC分类号： H01L21/3105 ,  B08B7/0021 ,  H01L21/02101

    摘要： A method comprises extracting impurities from one or more materials in a semiconductor device via treatment with a supercritical fluid (SCF). The SCF may comprise a solvent and one or more co-solvents. Solvents may comprise 1-hexanol, 1-propanol, 2-propanol, acetone, ammonia, argon, carbon dioxide, chlorotrifluoromethane, cyclohexane, dichlorodifluoromethane, ethane, ethyl alcohol, ethylene, methane, methanol, n-butane, n-hexane, nitrous oxide, n-pentane, propane, propylene, toluene, trichlorofluoromethane, trichloromethane, water, or combinations thereof.

    摘要翻译： 一种方法包括通过用超临界流体（SCF）处理从半导体器件中的一种或多种材料中提取杂质。 SCF可以包含溶剂和一种或多种共溶剂。 溶剂可以包括1-己醇，1-丙醇，2-丙醇，丙酮，氨，氩气，二氧化碳，三氟甲烷，环己烷，二氯二氟甲烷，乙烷，乙醇，乙烯，甲烷，甲醇，正丁烷，正己烷，亚硝酸 氧化物，正戊烷，丙烷，丙烯，甲苯，三氯氟甲烷，三氯甲烷，水或其组合。

    Silylation method for reducing critical dimension loss and resist loss
    50.
    发明授权
    Silylation method for reducing critical dimension loss and resist loss 有权
    用于降低临界尺寸损失和抗损耗的硅烷化方法

    公开(公告)号：US6107177A

    公开(公告)日：2000-08-22

    申请号：US382933

    申请日：1999-08-25

    申请人： Zhijian Lu ,  Wayne Moreau

    发明人： Zhijian Lu ,  Wayne Moreau

    IPC分类号： H01L21/027 ,  H01L21/311 ,  H01L21/768 ,  H01L21/44

    CPC分类号： H01L21/0273 ,  H01L21/0276 ,  H01L21/31144 ,  H01L21/76808 ,  H01L21/76813

    摘要： A method for reducing critical dimension loss and resist loss dimensions during etching includes providing a dielectric layer having an anti-reflection layer formed thereon and patterning a resist layer on the anti-reflection layer. The resist layer is exposed to an agent including silicon, and the agent is reacted with the resist to form a silylation region on exposed surfaces of the resist layer. The anti-reflection layer is etched by employing the silylation regions as an etch mask wherein the silylation regions have a greater resistance to etching than the antireflection layer and the resist layer.

    摘要翻译： 一种在蚀刻期间减小临界尺寸损失并抵抗损耗尺寸的方法包括提供其上形成有抗反射层并在抗反射层上图案化抗蚀剂层的电介质层。 将抗蚀剂层暴露于包含硅的试剂，并使试剂与抗蚀剂反应，以在抗蚀剂层的暴露表面上形成甲硅烷基化区域。 通过使用甲硅烷基化区域作为蚀刻掩模蚀刻抗反射层，其中甲硅烷基化区域具有比防反射层和抗蚀剂层更大的抗蚀刻性。