公开(公告)号：US20100304563A1

公开(公告)日：2010-12-02

申请号：US12814942

申请日：2010-06-14

申请人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

发明人： Kevin K. Chan ,  Christian Lavoie ,  Kern Rim

IPC分类号： H01L21/283

CPC分类号： H01L29/66507 ,  H01L29/6653 ,  H01L29/7833

摘要： A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide.

摘要翻译： 提供了包括多个不同的自对准硅化物触点的金属氧化物半导体场效应晶体管（MOSFET）结构及其制造方法。 MOSFET结构包括至少一个金属氧化物半导体场效应晶体管，其具有包括位于含Si衬底的表面上的栅极边缘的栅极导体; 第一内部硅化物，其具有基本上与所述至少一个金属氧化物半导体场效应晶体管的栅极边缘对准的边缘; 以及位于第一内部硅化物附近的第二外部硅化物。 根据本发明，第二外部硅化物的第二厚度大于第一内部硅化物的第一厚度。 此外，第二外部硅化物的电阻率低于第一内部硅化物的电阻率。

公开(公告)号：US07682968B2

公开(公告)日：2010-03-23

申请号：US12108001

申请日：2008-04-23

申请人： Cyril Cabral, Jr. ,  Roy A. Carruthers ,  Christophe Detavernier ,  Simon Gaudet ,  Christian Lavoie ,  Huiling Shang

发明人： Cyril Cabral, Jr. ,  Roy A. Carruthers ,  Christophe Detavernier ,  Simon Gaudet ,  Christian Lavoie ,  Huiling Shang

IPC分类号： H01L21/44

CPC分类号： H01L21/28525 ,  H01L21/28052 ,  H01L21/28518 ,  H01L29/665

摘要： A method for forming germano-silicide contacts atop a Ge-containing layer that is more resistant to etching than are conventional silicide contacts that are formed from a pure metal is provided. The method of the present invention includes first providing a structure which comprises a plurality of gate regions located atop a Ge-containing substrate having source/drain regions therein. After this step of the present invention, a Si-containing metal layer is formed atop the said Ge-containing substrate. In areas that are exposed, the Ge-containing substrate is in contact with the Si-containing metal layer. Annealing is then performed to form a germano-silicide compound in the regions in which the Si-containing metal layer and the Ge-containing substrate are in contact; and thereafter, any unreacted Si-containing metal layer is removed from the structure using a selective etch process. In some embodiments, an additional annealing step can follow the removal step. The method of the present invention provides a structure having a germano-silicide contact layer atop a Ge-containing substrate, wherein the germano-silicide contact layer contains more Si than the underlying Ge-containing substrate.

摘要翻译： 提供了一种形成锗硅化物的方法，该方法与由纯金属形成的常规硅化物接触相比更能抵抗蚀刻的含Ge层顶部接触。 本发明的方法包括首先提供一种结构，该结构包括位于其中具有源极/漏极区域的含Ge衬底顶部的多个栅极区域。 在本发明的该步骤之后，在所述含Ge基材上形成含Si金属层。 在暴露的区域中，含Ge衬底与含Si金属层接触。 然后进行退火以在含Si金属层和含Ge基板接触的区域中形成锗化硅化合物; 此后，使用选择性蚀刻工艺从结构中除去任何未反应的含Si金属层。 在一些实施方案中，附加的退火步骤可以跟随去除步骤。 本发明的方法提供了一种在含Ge衬底顶上具有锗硅化物接触层的结构，其中锗硅化物接触层含有比下面的含Ge衬底更多的Si。

公开(公告)号：US20100003800A1

公开(公告)日：2010-01-07

申请号：US12557557

申请日：2009-09-11

申请人： Francois Pagette ,  Christian Lavoie ,  Anna Topol

发明人： Francois Pagette ,  Christian Lavoie ,  Anna Topol

IPC分类号： H01L21/331

CPC分类号： H01L29/737 ,  H01L29/0821 ,  H01L29/66242

摘要： Embodiments of the invention provide a method of fabricating a semiconductor device. The method includes defining a sub-collector region in a layer of doped semiconductor material; forming an active region, a dielectric region, and a reach-through region on top of the layer of doped semiconductor material with the dielectric region separating the active region from the reach-through region; and siliciding the reach-through region and a portion of the sub-collector region to form a partially silicided conductive pathway. A semiconductor device made thereby is also provided.

摘要翻译： 本发明的实施例提供一种制造半导体器件的方法。 该方法包括在掺杂半导体材料层中限定子集电极区; 在所述掺杂半导体材料层的顶部上形成有源区，电介质区和到达区，所述电介质区将所述有源区与所述覆盖区分离; 并且将通过区域和子集电极区域的一部分硅化以形成部分硅化物的导电路径。 还提供了由此制成的半导体器件。

公开(公告)号：US07517795B2

公开(公告)日：2009-04-14

申请号：US11551647

申请日：2006-10-20

申请人： Roy A. Carruthers ,  Cedrik Y. Cole ,  Christophe Detavernier ,  Christian Lavoie ,  Kenneth P. Rodbell

发明人： Roy A. Carruthers ,  Cedrik Y. Cole ,  Christophe Detavernier ,  Christian Lavoie ,  Kenneth P. Rodbell

IPC分类号： H01L21/44

CPC分类号： H01L21/28052 ,  H01L21/28518 ,  H01L29/665

摘要： A method for forming a stabilized metal silicide film, e.g., contact (source/drain or gate), that does not substantially agglomerate during subsequent thermal treatments, is provided In the present invention, ions that are capable of attaching to defects within the Si-containing layer are implanted into the Si-containing layer prior to formation of metal silicide. The implanted ions stabilize the film, because the implants were found to substantially prevent agglomeration or at least delay agglomeration to much higher temperatures than in cases in which no implants were used.

摘要翻译： 在后续热处理中，形成稳定的金属硅化物膜例如接触（源极/漏极或栅极）的方法基本上不附着在本发明中，能够附着在Si- 在形成金属硅化物之前，将含硅层注入到含Si层中。 植入的离子稳定膜，因为发现植入物基本上防止结块或至少延迟聚集到比没有使用植入物的情况下更高的温度。

公开(公告)号：US20090026623A1

公开(公告)日：2009-01-29

申请号：US11828455

申请日：2007-07-26

申请人： Christian Lavoie ,  Francois Pagette ,  Anna W. Topol

发明人： Christian Lavoie ,  Francois Pagette ,  Anna W. Topol

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L23/53271 ,  H01L21/743 ,  H01L21/76243 ,  H01L21/76889 ,  H01L21/84 ,  H01L23/535 ,  H01L27/1203 ,  H01L29/78603 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for forming a metal-semiconductor alloy layer uses particular thermal annealing conditions to provide a stress free metal-semiconductor alloy layer through interdiffusion of a buried semiconductor material layer and a metal-semiconductor alloy forming metal layer that contacts the buried semiconductor material layer within an aperture through a capping layer beneath which is buried the semiconductor material layer. A resulting semiconductor structure includes the metal-semiconductor alloy layer that further includes an interconnect portion beneath the capping layer and a contiguous via portion that penetrates at least partially through the capping layer. Such a metal-semiconductor alloy layer may be located interposed between a substrate and a semiconductor device having an active doped region.

摘要翻译： 一种形成金属 - 半导体合金层的方法使用特定的热退火条件，通过掩埋半导体材料层和接触掩埋半导体材料层的金属 - 半导体合金形成金属层的相互扩散来提供无应力的金属 - 半导体合金层， 穿过覆盖层的孔，其下埋有半导体材料层。 所得到的半导体结构包括还包括覆盖层下面的互连部分的金属 - 半导体合金层和至少部分地穿过覆盖层的连续通孔部分。 这种金属 - 半导体合金层可以位于衬底和具有有源掺杂区域的半导体器件之间。

公开(公告)号：US20080217781A1

公开(公告)日：2008-09-11

申请号：US12105037

申请日：2008-04-17

申请人： Christophe Detavernier ,  Simon Gaudet ,  Christian Lavoie ,  Conal E. Murray

发明人： Christophe Detavernier ,  Simon Gaudet ,  Christian Lavoie ,  Conal E. Murray

IPC分类号： H01L23/498

CPC分类号： H01L21/28518 ,  H01L21/2855

摘要： The present invention provides a method for producing thin nickel (Ni) monosilicide or NiSi films (having a thickness on the order of about 30 nm or less), as contacts in CMOS devices wherein an amorphous Ni alloy silicide layer is formed during annealing which eliminates (i.e., completely by-passing) the formation of metal-rich silicide layers. By eliminating the formation of the metal-rich silicide layers, the resultant NiSi film formed has improved surface roughness as compared to a NiSi film formed from a metal-rich silicide phase. The method of the present invention also forms Ni monosilicide films without experiencing any dependence of the dopant type concentration within the Si-containing substrate that exists with the prior art NiSi films.

公开(公告)号：US20080164494A1

公开(公告)日：2008-07-10

申请号：US11620242

申请日：2007-01-05

申请人： Francois Pagette ,  Christian Lavoie ,  Anna Topol

发明人： Francois Pagette ,  Christian Lavoie ,  Anna Topol

IPC分类号： H01L29/737 ,  H01L29/73 ,  H01L21/04

CPC分类号： H01L29/737 ,  H01L29/0821 ,  H01L29/66242

摘要： Embodiments of the invention provide a semiconductor device including a collector in an active region; a first and a second sub-collector, the first sub-collector being a heavily doped semiconductor material adjacent to the collector and the second sub-collector being a silicided sub-collector next to the first sub-collector; and a silicided reach-through in contact with the second sub-collector, wherein the first and second sub-collectors and the silicided reach-through provide a continuous conductive pathway for electrical charges collected by the collector from the active region. Embodiments of the invention also provide methods of fabricating the same.

摘要翻译： 本发明的实施例提供了一种在有源区域中包括集电极的半导体器件; 第一和第二子集电极，所述第一子集电极是与所述集电极相邻的重掺杂半导体材料，所述第二子集电极是靠近所述第一子集电极的硅化副集电极; 以及与所述第二子集电器接触的硅化物到达通道，其中所述第一和第二子集电极和所述硅化物到达通道为所述集电器从所述有源区域收集的电荷提供连续的导电路径。 本发明的实施例还提供了制造该方法的方法。

公开(公告)号：US20070275548A1

公开(公告)日：2007-11-29

申请号：US11440202

申请日：2006-05-24

申请人： Christian Lavoie ,  Conal E. Murray ,  Kenneth P. Rodbell

发明人： Christian Lavoie ,  Conal E. Murray ,  Kenneth P. Rodbell

IPC分类号： H01L21/44

CPC分类号： H01L23/485 ,  H01L21/28518 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53209 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A semiconductor structure in which the contact resistance in the contact opening is reduced as well as a method of forming the same are provided. This is achieved in the present invention by replacing conventional contact metallurgy, such as tungsten, or a metal silicide, such as Ni silicide or Cu silicide, with a metal germanide-containing contact material. The term “metal germanide-containing” is used in the present application to denote a pure metal germanide (i.e., MGe alloy) or a metal germanide that includes Si (i.e., MSiGe alloy).

摘要翻译： 提供了其中接触开口中的接触电阻降低的半导体结构及其形成方法。 这在本发明中通过用含金属锗化物的接触材料代替常规的接触冶金例如钨或金属硅化物，例如硅化镍或硅化铜，来实现。 在本申请中使用的术语“含金属锗”表示纯金属锗（即MGe合金）或包含Si（即，MSiGe合金）的金属锗化物。

公开(公告)号：US20070218641A1

公开(公告)日：2007-09-20

申请号：US11308259

申请日：2006-03-14

申请人： David Ahlgren ,  Guy Cohen ,  Christian Lavoie ,  Francois Pagette ,  Anna Topol

发明人： David Ahlgren ,  Guy Cohen ,  Christian Lavoie ,  Francois Pagette ,  Anna Topol

IPC分类号： H01L21/331 ,  H01L21/8222

CPC分类号： H01L29/1004 ,  H01L29/1608 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/732 ,  H01L29/7378

摘要： A system and method comprises forming an intrinsic base on a collector. The system and method further includes forming a fully silicided extrinsic base on the intrinsic base by a self-limiting silicidation process at a predetermined temperature and for a predetermined amount of time, the silicidation substantially stopping at the intrinsic base. The system and method further includes forming an emitter which is physically insulated from the extrinsic base and the collector, and which is in physical contact with the intrinsic base.

摘要翻译： 一种系统和方法包括在收集器上形成固有碱基。 该系统和方法还包括通过在预定温度下的自限硅化工艺在本征基底上形成完全硅化的外在碱，并且预定量的时间，硅化物在本征碱基本上停止。 该系统和方法还包括形成与外部基极和集电器物理绝缘的发射极，并与内部基极物理接触。

公开(公告)号：US07271486B2

公开(公告)日：2007-09-18

申请号：US11075289

申请日：2005-03-08

申请人： Cyril Cabral, Jr. ,  Roy A. Carruthers ,  Christophe Detavernier ,  James M. E. Harper ,  Christian Lavoie

发明人： Cyril Cabral, Jr. ,  Roy A. Carruthers ,  Christophe Detavernier ,  James M. E. Harper ,  Christian Lavoie

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： C04B35/58 ,  C04B35/58085 ,  C04B2235/40 ,  C04B2235/404 ,  C04B2235/405 ,  C04B2235/408 ,  C23C26/00 ,  C23C30/00 ,  H01L21/28518 ,  H01L21/76889

摘要： A method for providing a low resistance non-agglomerated Ni monosilicide contact that is useful in semiconductor devices. Where the inventive method of fabricating a substantially non-agglomerated Ni alloy monosilicide comprises the steps of: forming a metal alloy layer over a portion of a Si-containing substrate, wherein said metal alloy layer comprises of Ni and one or multiple alloying additive(s), where said alloying additive is Ti, V, Ge, Cr, Zr, Nb, Mo, Hf, Ta, W, Re, Rh, Pd or Pt or mixtures thereof; annealing the metal alloy layer at a temperature to convert a portion of said metal alloy layer into a Ni alloy monosilicide layer; and removing remaining metal alloy layer not converted into Ni alloy monosilicide. The alloying additives are selected for phase stability and to retard agglomeration. The alloying additives most efficient in retarding agglomeration are most efficient in producing silicides with low sheet resistance.

摘要翻译： 一种用于提供半导体器件中有用的低电阻非聚集Ni单硅化物接触的方法。 在制造基本上非团聚的Ni合金一硅化硅的本发明方法中，包括以下步骤：在含Si衬底的一部分上形成金属合金层，其中所述金属合金层包括Ni和一种或多种合金添加剂 ），其中所述合金添加剂为Ti，V，Ge，Cr，Zr，Nb，Mo，Hf，Ta，W，Re，Rh，Pd或Pt或其混合物; 在将所述金属合金层的一部分转化为Ni合金一硅化物层的温度下退火金属合金层; 并且除去未转化为Ni合金一硅化物的剩余金属合金层。 选择合金添加剂用于相稳定性并阻止团聚。 延迟聚集中最有效的合金添加剂在生产低薄层电阻的硅化物中是最有效的。