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41.发明申请公开(公告)号：US20230086999A1
公开(公告)日：2023-03-23
申请号：US17801003
申请日：2021-10-12
Inventor： Tongshang SU , Jun CHENG , Bin ZHOU , Ce ZHAO , Qinghe WANG , Jun WANG , Liangchen YAN
Abstract: Provided are a gate driving circuit and a manufacturing method therefor, an array substrate, and a display device, relating to the technical field of display. At least one transistor in the gate driving circuit comprises a first light-shielding layer made of an electrically conductive material, and the first light-shielding layer is connected to a first gate metal layer of the transistor, such that two electrically conductive channels are formed, and the ON-state current is increased, thereby effectively suppressing negative drift of a threshold voltage.
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公开(公告)号：US20210313356A1
公开(公告)日：2021-10-07
申请号：US16761231
申请日：2019-10-28
Inventor： Ning LIU , Bin ZHOU , Jun LIU , Yang ZHANG , Tongshang SU , Haitao WANG
Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device including the display substrate. The method includes: forming a conductive layer; forming a first photoresist pattern and a second photoresist pattern on the conductive layer, in which the adhesion between the first photoresist pattern and the conductive layer is less than the adhesion between the second photoresist pattern and the conductive layer; and etching the conductive layer by using the first photoresist pattern and the second photoresist pattern as masks to form a first conductive pattern and a second conductive pattern, respectively, in which a line width difference between the first conductive pattern and the first photoresist pattern is greater than a line width difference between the second conductive pattern and the second photoresist pattern.
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公开(公告)号：US20210296406A1
公开(公告)日：2021-09-23
申请号：US17264283
申请日：2020-05-12
Inventor： Jingang FANG , Luke DING , Jun LIU , Bin ZHOU , Jun CHENG
Abstract: The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.
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公开(公告)号：US20210159279A1
公开(公告)日：2021-05-27
申请号：US17043962
申请日：2020-04-22
Inventor： Jun LIU , Liangchen YAN , Bin ZHOU , Wei LI , Tongshang SU , Yongchao HUANG , Biao LUO , Xuehai GUI
IPC: H01L27/32
Abstract: An array substrate is provided, including a base substrate, a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode that are sequentially provided, and further including a first insulating layer, a second insulating layer, a third insulating layer, at least one first via, and at least one second via. Each first via penetrates through the third insulating layer, and in each pixel unit with plural chromatic color resists, each first via is between adjacent two chromatic color resists and filled by one of the adjacent two chromatic color resists. Each second via penetrates through the second insulating layer, the at least one second via is in one-to-one correspondence with the at least one first via, each second via is filled by a chromatic color resist having a same color as that of the chromatic color resist in the corresponding first via.
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公开(公告)号：US20200075704A1
公开(公告)日：2020-03-05
申请号：US16456619
申请日：2019-06-28
Inventor： Jun LIU , Liangchen YAN , Bin ZHOU , Jun WANG , Tongshang SU , Biao LUO , Yang ZHANG
Abstract: An array substrate includes a base substrate, a transistor on the base substrate, a planarization layer on a side of the transistor away from the base substrate, a recessed portion on the planarization layer, and a light blocking portion in the recessed portion. The light blocking portion is configured to prevent a light from being incident upon an active layer.
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Patent Agency Ranking
46.发明申请公开(公告)号：US20200064734A1
公开(公告)日：2020-02-27
申请号：US16458341
申请日：2019-07-01
Inventor： Wei LI , Jingjing XIA , Bin ZHOU , Jun LIU , Tongshang SU , Yang ZHANG , Liangchen YAN
Abstract: Disclosed are a photoresist composition, a pixel definition structure and a manufacturing method thereof, and a display panel. The photoresist composition includes an organic film-forming resin, a superhydrophobic polymerizable monomer, a polyfunctional crosslinkable polymerizable monomer, a photoinitiator, an additive and a solvent.
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公开(公告)号：US20190371867A1
公开(公告)日：2019-12-05
申请号：US16488924
申请日：2019-01-31
Inventor： Yongchao HUANG , Dongfang WANG , Jun CHENG , Min HE , Bin ZHOU , Ce ZHAO
Abstract: A display panel, a method for manufacturing the display panel, and a display apparatus are provided. The display panel includes a base substrate; a thin film transistor; an OLED structure formed on the thin film transistor including a first and second electrodes arranged opposite to each other and an organic light emitting layer arranged between the first and second electrodes; a light shielding layer arranged between the first electrode and the organic light emitting layer. The light shielding layer includes a first and a second light shielding layers. The first light shielding layer includes a first light shielding portion and a first opening portion corresponding to a pixel area. The second light shielding layer includes a second light shielding portion and a second opening portion corresponding to a pixel area. The second light shielding portion includes a first and second parts.
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48.发明申请公开(公告)号：US20190172953A1
公开(公告)日：2019-06-06
申请号：US15992909
申请日：2018-05-30
Inventor： Yuankui DING , Ce ZHAO , Guangcai YUAN , Yingbin HU , Leilei CHENG , Jun CHENG , Bin ZHOU
IPC: H01L29/786 , H01L27/12 , H01L29/66
Abstract: The present disclosure discloses a TFT, a manufacturing method, an array substrate, a display panel, and a device. The TFT includes a hydrogen-containing buffer layer located on a substrate; an oxide semiconductor layer located on the buffer layer, wherein the oxide semiconductor layer includes a conductor region and a semiconductor region; a source or drain located on the conductor region, and electrically connected to the conductor region; and a gate structure located on the semiconductor region.
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公开(公告)号：US20170213975A1
公开(公告)日：2017-07-27
申请号：US15223465
申请日：2016-07-29
Inventor： Leilei CHENG , Dongfang WANG , Yongchao HUANG , Bin ZHOU , Luke DING , Min HE
CPC classification number: H01L51/0012 , H01L27/3244 , H01L51/0016 , H01L51/5253 , H01L51/56 , H01L2227/323
Abstract: A method for fabricating an Organic Light-Emitting Diode (OLED) display panel is provided. The method includes arranging Thin-Film Transistor (TFT) devices on one side of a substrate and a function layer on the other side of the substrate to form a laminate including both the TFT devices and the function layer, attaching the laminate onto a loading platform such that the function layer included in the laminate faces towards the loading platform, and conducting a process on the laminate to form an organic electroluminescent material layer on surfaces of the TFT devices.
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公开(公告)号：US20240389430A1
公开(公告)日：2024-11-21
申请号：US17921329
申请日：2021-11-09
Inventor： Ning LIU , Qinghe WANG , Jun LIU , Hao YIN , Bin ZHOU , Liangchen YAN
IPC: H10K59/80 , H10K50/11 , H10K59/12 , H10K59/124
Abstract: Provided is a display panel. The display panel includes a substrate; and an insulating layer disposed on the substrate, and an auxiliary electrode, a light-emitting layer, and a cathode layer that are stacked in sequence, the insulating layer being provided with a first via, and the auxiliary electrode and the cathode layer being lapped with each other in the first via; wherein an opening in a side, distal from the substrate, of the first via is of a polygonal shape, and the light-emitting layer forms a broken line at each edge of the opening.
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