公开(公告)号：US10713558B2

公开(公告)日：2020-07-14

申请号：US15395231

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Huseyin Ekin Sumbul ,  Gregory K. Chen ,  Raghavan Kumar ,  Phil Knag ,  Ram K. Krishnamurthy

IPC: G06N3/04 ,  G06N3/063 ,  G06N3/08

Abstract: In one embodiment, a method comprises determining that a membrane potential of a first neuron of a first neuron core exceeds a threshold; determining a first plurality of synapse cores that each store at least one synapse weight associated with the first neuron; and sending a spike message to the determined first plurality of synapse cores.

公开(公告)号：US20190102669A1

公开(公告)日：2019-04-04

申请号：US15721653

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Gregory K. Chen ,  Kshitij Bhardwaj ,  Raghavan Kumar ,  Huseyin E. Sumbul ,  Phil Knag ,  Ram K. Krishnamurthy ,  Himanshu Kaul

IPC: G06N3/04 ,  G06N3/063

Abstract: In one embodiment, a processor comprises a first neuromorphic core to implement a plurality of neural units of a neural network, the first neuromorphic core comprising a memory to store a current time-step of the first neuromorphic core; and a controller to track current time-steps of neighboring neuromorphic cores that receive spikes from or provide spikes to the first neuromorphic core; and control the current time-step of the first neuromorphic core based on the current time-steps of the neighboring neuromorphic cores.

公开(公告)号：US20180189631A1

公开(公告)日：2018-07-05

申请号：US15395231

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Huseyin Ekin Sumbul ,  Gregory K. Chen ,  Raghavan Kumar ,  Phil Knag ,  Ram K. Krishnamurthy

IPC: G06N3/04 ,  G06N3/08

CPC classification number: G06N3/04 ,  G06N3/049 ,  G06N3/063 ,  G06N3/08

Abstract: In one embodiment, a method comprises determining that a membrane potential of a first neuron of a first neuron core exceeds a threshold; determining a first plurality of synapse cores that each store at least one synapse weight associated with the first neuron; and sending a spike message to the determined first plurality of synapse cores.