摘要:
In one embodiment of the invention, a register format of a source register operated on by a source instruction in a source block of code is determined. The register format includes an input instruction format and an output block format of the source block of code. The source block of code runs in a source architecture. The source register has multiple formats and is used as an input of the source instruction. The input instruction format contains format of the source register expected by the source instruction. The output block format contains format of the source register after the source block of code is executed. An instruction format inconsistency is detected between the source register and a target register of a target architecture during a translation phase of a binary translation that translates the source block of code into a target block of code running in the target architecture.
摘要:
A technique includes performing multiple aligned accesses to a memory to retrieve data of a string misaligned with respect to boundaries of the memory by an offset. Based on the offset, a subset of the data is selected, and the subset is stored in a register.
摘要:
Embodiments of the invention disclose a method, apparatus and system of translating a source binary code into a target binary code. The translation according to embodiments of the invention may include determining whether or not a previously translated code block that relates to a source fragment to be currently translated may be reused for execution by a target processor. A reusability status of the previously translated code block may be determined based on a reusability status of a group of previously translated code blocks. In some embodiments, when no previously translated code blocks relating to the currently translated source fragment are found, the source fragment may be translated into a new target code block, which may be executed by the target processor. The new target code block may then be added to a group of previously translated code blocks.
摘要:
A set of source instructions that complies with a source architecture is dynamically translated into a set of target instructions that complies with a target architecture. At least some of exception-related dependencies between faulty instructions and their immediate preceding instructions, in the translated target instruction binary code, are removed. Instead, dependencies between mapping registers and their representative registers that are associated with the faulty instructions are created. Computations of the values of mapping registers, for the recovery of canonical registers, are delayed until exceptions are actually detected during execution of the target instructions. The restoration of context of source instructions at the exception-related recovery points is realized through the invoking of associated recovery functions.
摘要:
Mapping of exception masks between source and target architectures with different numbers of exception masks enables a binary translator to translate code from the source to the target architecture and to determine an appropriate state for the source architecture if an exception is raised when executing the translated code.
摘要:
FIG. 1 is a perspective view of a protective cover for tablet showing my new design; FIG. 2 is another perspective view thereof; FIG. 3 is a front elevational view thereof; FIG. 4 is a rear elevational view thereof; FIG. 5 is a left side elevational view thereof; FIG. 6 is a right side elevational view thereof; FIG. 7 is a top plan view thereof; FIG. 8 is a bottom plan view thereof; FIG. 9 is another perspective view of the protective cover for tablet, shown in an alternate configuration; and, FIG. 10 is another perspective view of the protective cover for tablet, shown in a state of use with an additional environmental tablet computer. Broken lines seen depicting a tablet computer in FIG. 10 depict environmental subject matter and form no part of the claimed design. All other broken lines seen in the drawings depict portions of the protective cover for tablet that form no part of the claimed design.