公开(公告)号：US07800962B2

公开(公告)日：2010-09-21

申请号：US12187841

申请日：2008-08-07

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/00

CPC分类号： G11C5/145 ,  G11C7/06 ,  G11C7/12 ,  G11C11/4074 ,  G11C11/4091

摘要： A semiconductor memory device includes a bit line sense amplifier for sensing and amplifying data applied on a bit line; a first driver for driving a pull-up voltage line of the bit line sense amplifier to a voltage applied on a normal driving voltage terminal; an overdriving signal generator for generating an overdriving signal defining an overdriving period in response to an active command; an overdriving control signal generator for receiving the overdriving signal to generate an overdriving control signal for selectively performing an overdriving operation according to a voltage level of an overdriving voltage; and a second driver for driving the normal driving voltage terminal to the overdriving voltage in response to the overdriving control signal.

摘要翻译： 一种半导体存储器件包括用于感测和放大施加在位线上的数据的位线读出放大器; 用于将位线读出放大器的上拉电压线驱动到施加在正常驱动电压端子上的电压的第一驱动器; 过驱动信号发生器，用于产生响应于有效命令定义过驱动周期的过驱动信号; 过驱动控制信号发生器，用于接收过驱动信号以产生过驱动控制信号，用于根据过驱动电压的电压电平选择性地执行过驱动; 以及用于响应于过驱动控制信号将正常驱动电压端驱动到过驱动电压的第二驱动器。

公开(公告)号：US07710795B2

公开(公告)日：2010-05-04

申请号：US12216138

申请日：2008-06-30

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/06

CPC分类号： G11C11/4074 ,  G11C5/145

摘要： A semiconductor memory device that includes a first high voltage oscillator configured to generate a first control pulse in response to a first enable signal, a level shifter configured to generate a high voltage control pulse by boosting a level of the first control pulse using a source high voltage, and a first high voltage generator configured to generate a high voltage by boosting an external power supply voltage in response to the high voltage control pulse.

摘要翻译： 一种半导体存储器件，包括：第一高压振荡器，被配置为响应于第一使能信号产生第一控制脉冲;电平移位器，被配置为通过使用源极高电平升高第一控制脉冲的电平来产生高电压控制脉冲 以及第一高电压发生器，其经配置以通过响应于高电压控制脉冲升高外部电源电压而产生高电压。

公开(公告)号：US07602664B2

公开(公告)日：2009-10-13

申请号：US11822814

申请日：2007-07-10

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C5/14

CPC分类号： G11C5/14 ,  G11C11/4074

摘要： A circuit for generating a voltage of a semiconductor memory apparatus includes a control unit that outputs a driving control signal in response to an enable signal and a burn-in signal, a first voltage generating unit that generates and outputs a first voltage in response to the enable signal, and a voltage maintaining unit that maintains the first voltage in response to the driving control signal.

摘要翻译： 用于产生半导体存储装置的电压的电路包括：控制单元，其响应于使能信号和老化信号而输出驱动控制信号;第一电压产生单元，其响应于第二电压产生并输出第一电压 使能信号，和维持单元，其维持响应于驱动控制信号的第一电压。

公开(公告)号：US07599243B2

公开(公告)日：2009-10-06

申请号：US11528339

申请日：2006-09-28

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C8/00

CPC分类号： G11C5/143 ,  G11C7/08 ,  G11C7/12 ,  G11C11/4074 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2207/065

摘要： A semiconductor memory device includes a bit line sense amplifying block that senses and amplifies bit line data. A first driving block drives a pull up power line of the bit line sense amplifying block using a voltage applied to a normal driving voltage terminal. A second driving block drives the normal driving voltage terminal using an over driving voltage. An over driving signal generation block generates an over driving signal that defines an over driving interval in response to an active command. An external power supply voltage level detection block detects a voltage level of the external power supply voltage. A selective output block selectively outputs the over driving signal in response to an output signal of the external power supply voltage level detection block, wherein an output signal of the selective output block controls the second driving block.

摘要翻译： 半导体存储器件包括感测和放大位线数据的位线读出放大块。 第一驱动块使用施加到正常驱动电压端子的电压来驱动位线读出放大块的上拉电源线。 第二驱动块使用过驱动电压来驱动正常驱动电压端子。 过驱动信号生成块响应于活动命令产生定义过驱动间隔的过驱动信号。 外部电源电压电平检测块检测外部电源电压的电压电平。 选择性输出块响应于外部电源电压检测块的输出信号选择性地输出过驱动信号，其中选择输出块的输出信号控制第二驱动块。

公开(公告)号：US20090175095A1

公开(公告)日：2009-07-09

申请号：US12134825

申请日：2008-06-06

申请人： Woo-Seung Han ,  Khil-Ohk Kang

发明人： Woo-Seung Han ,  Khil-Ohk Kang

IPC分类号： G11C5/14 ,  G05F1/10

CPC分类号： G11C5/145

摘要： A voltage sensing circuit is capable of controlling a pumping voltage to be stably generated in a low voltage environment. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

摘要翻译： 电压检测电路能够控制在低电压环境下稳定地产生的泵浦电压。 电压检测电路包括具有第一和第二端子的电流镜，第一开关元件，被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件，被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件，其被配置为控制第一和第二开关元件的电流源以接收负电压。

公开(公告)号：US20090059683A1

公开(公告)日：2009-03-05

申请号：US12216138

申请日：2008-06-30

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/00 ,  G11C8/08

CPC分类号： G11C11/4074 ,  G11C5/145

摘要： A semiconductor memory device that includes a first high voltage oscillator configured to generate a first control pulse in response to a first enable signal, a level shifter configured to generate a high voltage control pulse by boosting a level of the first control pulse using a source high voltage, and a first high voltage generator configured to generate a high voltage by boosting an external power supply voltage in response to the high voltage control pulse.

摘要翻译： 一种半导体存储器件，包括：第一高压振荡器，被配置为响应于第一使能信号产生第一控制脉冲;电平移位器，被配置为通过使用源极高电平升高第一控制脉冲的电平来产生高电压控制脉冲 以及第一高电压发生器，其经配置以通过响应于高电压控制脉冲升高外部电源电压而产生高电压。

公开(公告)号：US07492651B2

公开(公告)日：2009-02-17

申请号：US11714562

申请日：2007-03-06

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C11/00

CPC分类号： G11C29/842 ,  G11C29/785

摘要： A first input unit, coupled to a repair checking node through a first fuse, is for inverting a logic level of the repair checking node in response to a first address. A second input unit, coupled to the repair checking node through a two or more second fuses, is for inverting a logic level of the repair checking node in response to a second address. The number of the second fuses corresponds to a delay time between a transfer path of the first address and a transfer path of the second address. A repair detecting signal generating unit is for generating a repair detecting signal in response to the logic level of the repair checking node. Other embodiments are also described.

摘要翻译： 通过第一熔丝耦合到修复检查节点的第一输入单元用于响应于第一地址来反转修复检查节点的逻辑电平。 通过两个或更多个第二保险丝耦合到修复检查节点的第二输入单元用于响应于第二地址来反转修复检查节点的逻辑电平。 第二熔丝的数量对应于第一地址的传送路径和第二地址的传送路径之间的延迟时间。 修复检测信号生成单元用于响应于修复检查节点的逻辑电平产生修复检测信号。 还描述了其它实施例。

公开(公告)号：US07492645B2

公开(公告)日：2009-02-17

申请号：US11527440

申请日：2006-09-27

申请人： Khil-Ohk Kang ,  Young-Hoon Oh

发明人： Khil-Ohk Kang ,  Young-Hoon Oh

IPC分类号： G11C5/14

CPC分类号： G11C5/14 ,  G11C5/147

摘要： An internal voltage generator for a semiconductor memory device is provided. The internal voltage generator includes a first reference voltage generator for generating a first reference voltage, a second reference voltage generator for generating a second reference voltage, a core voltage generator for raising a core voltage based on the first reference voltage, and a core voltage discharger for discharging the core voltage depending on the second reference voltage.

摘要翻译： 提供了一种用于半导体存储器件的内部电压发生器。 内部电压发生器包括用于产生第一参考电压的第一参考电压发生器，用于产生第二参考电压的第二参考电压发生器，用于基于第一参考电压提高核心电压的核心电压发生器，以及核心电压放电器 用于根据第二参考电压放电核心电压。

公开(公告)号：US20080062777A1

公开(公告)日：2008-03-13

申请号：US11819633

申请日：2007-06-28

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C5/14

CPC分类号： G11C5/14

摘要： A semiconductor memory apparatus includes: a driving controller that decodes bank activating signals to generate a plurality of driving control signals, activates some of the driving control signals, and outputs the activated driving signals; and a plurality of internal voltage generators each of which outputs an internal voltage in response to a reference voltage and the corresponding driving control signal and is disposed between two different banks among a plurality of banks.

摘要翻译： 半导体存储装置包括：驱动控制器，其对存储体激活信号进行解码以产生多个驱动控制信号，激活一些驱动控制信号，并输出激活的驱动信号; 以及多个内部电压发生器，每个内部电压发生器响应于参考电压和相应的驱动控制信号输出内部电压并且被布置在多个存储体中的两个不同的存储体之间。

公开(公告)号：US08368460B2

公开(公告)日：2013-02-05

申请号：US12981205

申请日：2010-12-29

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G05F1/10

CPC分类号： G11C5/147

摘要： An internal voltage generation circuit includes an internal reference voltage generation unit configured to generate first and second reference voltages, a core voltage generation unit configured to receive the first reference voltage and to generate a core voltage based on the first reference voltage, and a bit line pre-charge voltage generation unit configured to receive the second reference voltage and to generate a bit-line pre-charge voltage based on the second reference voltage.

摘要翻译： 内部电压产生电路包括被配置为产生第一和第二参考电压的内部参考电压产生单元，被配置为接收第一参考电压并基于第一参考电压产生核心电压的核心电压产生单元，以及位线 被配置为接收第二参考电压并且基于第二参考电压产生位线预充电电压的预充电电压产生单元。