利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

135 条记录 (耗时 0.031 秒)

    DAMASCENE RETICLE AND METHOD OF MANUFACTURE THEREOF
    43.
    发明申请
    DAMASCENE RETICLE AND METHOD OF MANUFACTURE THEREOF 有权
    大理石制品及其制造方法

    公开(公告)号：US20080286660A1

    公开(公告)日：2008-11-20

    申请号：US11749384

    申请日：2007-05-16

    申请人： Kevin S. Petrarca ,  Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Rebecca D. Mih ,  Steven Steen ,  Henry Grabarz ,  Michael S. Hibbs

    发明人： Kevin S. Petrarca ,  Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Rebecca D. Mih ,  Steven Steen ,  Henry Grabarz ,  Michael S. Hibbs

    IPC分类号： G03F1/00 ,  C09K3/14

    CPC分类号： G03F1/00 ,  G03F1/26 ,  G03F1/50

    摘要： A method for manufacturing an optical projection reticle employs a damascene process. First feature recesses are etched into a projection reticle mask plate which is transmissive or transparent. Then feature recesses are tilled with a radiation transmissivity modifying material comprising a partially transmissive material and/or a radiation absorber for absorbing actinic radiation. Sacrificial materials may be added to the recess temporarily prior to filling the recess to provide gaps juxtaposed with the material filling the recess. Thereafter, the sacrificial materials are removed. Then the projection mask is planarized leaving feature recesses filled with transmissivity modifying material, and any gaps desired. The projection mask is planarized while retained in a fixture holding it in place during polishing with a polishing tool and a slurry.

    摘要翻译： 光学投影掩模版的制造方法采用镶嵌工艺。 第一特征凹槽被蚀刻到透射或透明的突出掩模掩模板中。 然后，特征凹部用包括用于吸收光化辐射的部分透射材料和/或辐射吸收体的辐射透射率改性材料研磨。 牺牲材料可以在填充凹部之前临时添加到凹部中，以提供与填充凹部的材料并置的间隙。 此后，去除牺牲材料。 然后将投影掩模平坦化，留下填充有透射率改性材料的特征凹部，以及任何期望的间隙。 投影面罩被平坦化，同时保持在用抛光工具和浆料抛光过程中将其固定在位置的夹具中。

    MEMS encapsulated structure and method of making same
    47.
    发明授权
    MEMS encapsulated structure and method of making same 有权
    MEMS封装结构及其制作方法

    公开(公告)号：US06800503B2

    公开(公告)日：2004-10-05

    申请号：US10300520

    申请日：2002-11-20

    申请人： Joseph T. Kocis ,  James Tornello ,  Kevin S. Petrarca ,  Richard Volant ,  Seshadri Subbanna

    发明人： Joseph T. Kocis ,  James Tornello ,  Kevin S. Petrarca ,  Richard Volant ,  Seshadri Subbanna

    IPC分类号： H01L2100

    CPC分类号： B81C1/00666 ,  B81B2201/014 ,  B81C2201/0167 ,  H01F2007/068 ,  H01H50/005

    摘要： A method of fabricating an encapsulated micro electro-mechanical system (MEMS) and making of same that includes forming a dielectric layer, patterning an upper surface of the dielectric layer to form a trench, forming a release material within the trench, patterning an upper surface of the release material to form another trench, forming a first encapsulating layer that includes sidewalls within the another trench, forming a core layer within the first encapsulating layer, and forming a second encapsulating layer above the core layer, where the second encapsulating layer is connected to the sidewalls of the first encapsulating layer. Alternatively, the method includes forming a multilayer MEMS structure by photomasking processes to form a first metal layer, a second layer including a dielectric layer and a second metal layer, and a third metal layer. The core layer and the encapsulating layers are made of materials with complementary electrical, mechanical and/or magnetic properties.

    摘要翻译： 一种制造封装的微电子机械系统（MEMS）的方法及其制造方法，包括形成电介质层，图案化介电层的上表面以形成沟槽，在沟槽内形成释放材料，图案化上表面 形成另一个沟槽，形成第一封装层，该第一封装层包括另一个沟槽内的侧壁，在第一封装层内形成核心层，以及在芯层上方形成第二封装层，其中第二封装层被连接 到第一封装层的侧壁。 或者，该方法包括通过光掩模工艺形成多层MEMS结构以形成第一金属层，第二层包括电介质层和第二金属层以及第三金属层。 芯层和封装层由具有互补的电，机械和/或磁性的材料制成。

    Multilevel interconnect structure containing air gaps and method for making
    49.
    发明授权
    Multilevel interconnect structure containing air gaps and method for making 有权
    包含气隙的多层互连结构和制造方法

    公开(公告)号：US06737725B2

    公开(公告)日：2004-05-18

    申请号：US10144574

    申请日：2002-05-13

    申请人： Alfred Grill ,  Jeffrey Curtis Hedrick ,  Christopher Vincent Jahnes ,  Satyanarayana Venkata Nitta ,  Kevin S. Petrarca ,  Sampath Purushothaman ,  Katherine Lynn Saenger ,  Stanley Joseph Whitehair

    发明人： Alfred Grill ,  Jeffrey Curtis Hedrick ,  Christopher Vincent Jahnes ,  Satyanarayana Venkata Nitta ,  Kevin S. Petrarca ,  Sampath Purushothaman ,  Katherine Lynn Saenger ,  Stanley Joseph Whitehair

    IPC分类号： H01L2900

    CPC分类号： H01L21/7682 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76885

    摘要： A method for forming a multilayer interconnect structure on a substrate that include interconnected conductive wiring and vias spaced apart by a combination of solid or gaseous dielectrics. The inventive method includes the steps of: (a) forming a first planar via plus line level pair embedded in a dielectric matrix formed from one or more solid dielectrics and comprising a via level dielectric and a line level dielectric on a substrate, wherein, at least one of said solid dielectrics is at least partially sacrificial; (b) etching back sacrificial portions of said at least partially sacrificial dielectrics are removed to leave cavities extending into and through said via level, while leaving, at least some of the original via level dielectric as a permanent dielectric under said lines; (c) partially filling or overfilling said cavities with a place-holder material which may or may not be sacrificial; (d) planarizing the structure by removing overfill of said place-holder material; (e) repeating, as necessary, steps (a)-(d); (f) forming a dielectric bridge layer over the planar structure; and (g) forming air gaps by at least partially extracting said place-holder material.

    摘要翻译： 一种在衬底上形成多层互连结构的方法，其包括互连的导电布线和通过固体或气体电介质的组合间隔开的通孔。 本发明的方法包括以下步骤：（a）形成嵌入在由一个或多个固体电介质形成的电介质矩阵中并且包括通孔层电介质和衬底上的线路电介质的介电矩阵中的第一平面通孔加线电平对，其中，在 至少一个所述固体电介质至少部分地是牺牲的; （b）蚀刻所述至少部分牺牲电介质的牺牲部分被去除以留下延伸进入并穿过所述通孔级的空腔，同时留下至少一些原始通孔级电介质作为所述线下的永久电介质; （c）用可能牺牲或可能不是牺牲的位置保持材料部分填充或过度填充所述空腔; （d）通过去除所述位置保持器材料的过量填充来平坦化结构; （e）必要时重复步骤（a） - （d）; （f）在所述平面结构上形成电介质桥接层; 和（g）通过至少部分地提取所述放置支架材料形成气隙。