OUTPUT BUFFER
    41.
    发明申请
    OUTPUT BUFFER 有权
    输出缓冲器

    公开(公告)号:US20140009191A1

    公开(公告)日:2014-01-09

    申请号:US13786481

    申请日:2013-03-06

    Inventor: Chun-Hung Chen

    Abstract: An output buffer is disclosed. The output buffer includes an input-stage circuit, an output-stage circuit and a compensation circuit. The compensation circuit includes a capacitor, a first switch, a second switch, a third switch, and a fourth switch. The input-stage circuit receives a differential input signal and outputting a response signal. The output-stage circuit receives the response signal and outputting an output signal. The first switch controls a connection between the input-stage circuit and a first terminal of the capacitor. The second switch controls the connection between an output terminal of the compensation circuit and a second terminal of the capacitor. The third switch controls the connection between the input-stage circuit and the second-terminal of the capacitor. The forth switch controls the connection between the output terminal of the compensation circuit and the first terminal of the capacitor.

    Abstract translation: 公开了输出缓冲器。 输出缓冲器包括输入级电路,输出级电路和补偿电路。 补偿电路包括电容器,第一开关,第二开关,第三开关和第四开关。 输入级电路接收差分输入信号并输出​​响应信号。 输出级电路接收响应信号并输出​​输出信号。 第一开关控制输入级电路和电容器的第一端之间的连接。 第二开关控制补偿电路的输出端子和电容器的第二端子之间的连接。 第三开关控制输入级电路和电容器的第二端之间的连接。 第四开关控制补偿电路的输出端子与电容器的第一端子之间的连接。

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