Plasma display and driving method thereof
    41.
    发明申请
    Plasma display and driving method thereof 审中-公开
    等离子体显示及其驱动方法

    公开(公告)号:US20070115214A1

    公开(公告)日:2007-05-24

    申请号:US11602197

    申请日:2006-11-21

    IPC分类号: G09G3/28

    摘要: In a plasma display device, subfields may be divided into subfield groups and row electrodes are driven by row groups. Non-light emitting cells may be selected from discharge cells of the row groups during a first address period of the row groups, and light emitting cells of the row groups may be sustain discharged during a first sustain period between two adjacent first address periods in the respective subfields of the first subfield group. A weight of at least one first subfield of the first subfield group may be different from that of at least one second subfield of the first subfield group.

    摘要翻译: 在等离子体显示装置中,子场可分为子场组,行电极由行组驱动。 非发光单元可以在行组的第一寻址周期期间从行组的放电单元中选择,并且行组中的发光单元可以在第一维持周期期间的第二维持周期中维持放电 第一子场组的各个子场。 第一子场组的至少一个第一子场的权重可以与第一子场组的至少一个第二子场的权重不同。

    Fabrication of lean-free stacked capacitors
    42.
    发明申请
    Fabrication of lean-free stacked capacitors 审中-公开
    无稀土堆叠电容器的制造

    公开(公告)号:US20060211178A1

    公开(公告)日:2006-09-21

    申请号:US11405340

    申请日:2006-04-17

    IPC分类号: H01L21/82

    摘要: For fabricating lean-free stacked capacitors, openings are formed through layers of materials including a layer of support material displaced from a bottom of the openings. A respective first electrode is formed for a respective capacitor within each of the openings. The layer of support material is patterned to form support structures around the first electrodes. Masking spacers are formed around exposed top portions of the first electrodes, and exposed portions of the support material are etched away to form the support structures. Such stacked capacitors are applied within a DRAM (dynamic random access memory).

    摘要翻译: 为了制造无稀土堆叠电容器,通过材料层形成开口,包括从开口底部移位的支撑材料层。 在每个开口内为相应的电容器形成相应的第一电极。 图案化支撑材料层以形成围绕第一电极的支撑结构。 在第一电极的暴露的顶部周围形成遮蔽间隔物,并且蚀刻掉支撑材料的暴露部分以形成支撑结构。 这种叠层电容器被应用在DRAM(动态随机存取存储器)内。

    Internal voltage generating circuit
    43.
    发明授权
    Internal voltage generating circuit 有权
    内部电压发生电路

    公开(公告)号:US07049881B2

    公开(公告)日:2006-05-23

    申请号:US10799023

    申请日:2004-03-09

    IPC分类号: G05F1/10

    CPC分类号: G11C5/147

    摘要: A circuit comprises a comparing means for comparing an internal voltage to a reference voltage for outputting a first driving signal, an internal voltage driving means for outputting the internal voltage in response to the first driving signal; an internal voltage detecting means for detecting the internal voltage and for generating a second driving signal in response to an active signal, and an overdriving control means for controlling the first driving signal in response to the second driving signal.

    摘要翻译: 电路包括用于比较内部电压与用于输出第一驱动信号的参考电压的比较装置,用于响应于第一驱动信号输出内部电压的内部电压驱动装置; 内部电压检测装置,用于响应于有效信号检测内部电压和产生第二驱动信号;以及过驱动控制装置,用于响应于第二驱动信号控制第一驱动信号。