摘要:
A first line stub SB1 and one end of each of two switches SW1 and SW2 are connected to a transmission line 11L at spacings L1, L2 and L3 in order from the input end of the transmission line 11 L, the other ends of the two switches are connected to a second line stub SB2, the first and second line stubs have an open end or short-circuit end, and matching at any of four frequency bands can be selected by combining on and off of the two switches SW1 and SW2.
摘要:
A matching circuit including a main matching block 51 inserted in a signal path and a series matching block 522, one end of which is connected to the main matching block 51, in which one end of a series connection of a switch 542 and a parallel matching block 532 is connected to the signal path at the other end of the series matching block 522 and impedance matching between input/output is performed at any one of two frequencies by setting the switch to ON/OFF.
摘要:
A radio communication device in which the output transmission signal of a high-frequency power amplifying part is sent out to an antenna via a circulator, a high-frequency signal reflected from the antenna is transferred via the circulator to a rectifying part to obtain a direct current power, and the direct current power is supplied to a power amplifying part or another constituent part in the radio communication device as an aid to the power supply from a power supply unit.
摘要:
The present invention has for its object to provide a matching circuit with multiband capability which can be reduced in size, even if the number of handled frequency bands rises. The matching circuit of the present invention comprises a load having frequency-dependent characteristics, a first matching block connected with one end to the load with frequency-dependent characteristics, and a second matching block formed by lumped elements connected in series to the first matching block. And then, when a certain frequency band is used, matching is obtained with the series impedance of the first matching block and the second matching block. When a separate frequency band is used, a π-type circuit is constituted by connecting auxiliary matching blocks to both sides of the second matching block. Next, at the same frequency, by taking the combined impedance of this π-type circuit and a load whose characteristics do not depend on the frequency to be Z0, the influence of the second matching block is removed.
摘要:
A matching circuit includes a demultiplexer for demultiplexing a signal outputted from an amplification device into signals of respective frequency bands, and at least two matching blocks which are connected to the demultiplexer, are respectively fed with the signals of the respective frequency bands, and perform impedance matching in the respective frequency bands of the inputted signals. Impedance matching is performed on each of the demultiplexed signals of the respective frequency bands, thereby achieving a matching circuit capable of efficiently performing impedance matching in the respective frequency bands. With this matching circuit, it is possible to achieve a multi-band amplifier capable of simultaneously amplifying signals of multiple frequency bands with high efficiency and low noise.
摘要:
A bias circuit 100 comprises: a first reactance means 2 connected to an AC circuit; a second reactance means 3 connected to the first reactance means 2; a switch 7 connected to a connection point 210 between them; a third reactance means 8 connected to the switch 7; a capacitive means 4 connected to the second reactance means 3; and a DC circuit 5 connected to a connection point 220 between the second reactance means 3 and the capacitive means 4; wherein the connection point 220 is grounded in terms of alternating current. The connection point 210 is at a position such that impedance as viewed from the connection point 210 toward the capacitive means 4 is sufficiently large at a second frequency different from a first frequency. Impedance as viewed from a bias point 800 toward the bias circuit is sufficiently large at any of the frequencies.
摘要:
A stabilization circuit 100 which comprises: serial stabilization blocks 110, 120 connected in series, with respect to a signal to be amplified, with an amplification element; parallel stabilization blocks 130, 140 connected in parallel with the amplification element, with respect to a signal to be amplified; and a switch parts 150 capable of connecting and disconnecting said parallel stabilization block 140, with respect to a signal to be amplified.
摘要:
Four variable reactance means (10-13) are connected, respectively, to the four ports (1-4) of a quadrature hybrid circuit which is composed of four ring-linked two-port circuits (180-183) each composed of a transmission line or multiple lumped reactance elements, so that by changing the reactance values of the four variable reactance means (10-13), operating frequency of the quadrature hybrid circuit can be selectively changed.
摘要:
The present invention has for its object to provide a bias circuit capable of handling multiple frequency bands, which has a low number of parts and can be miniaturized. As a solving means therefor, the bias circuit of the present invention comprises: a first reactance means 2 and a second reactance means 5, one end each of which is connected to a bias point 210 to which an alternating current signal is supplied; a capacitive means 3 connecting the other end of first reactance means 2; and a direct-current circuit 4 supplying a direct-current bias signal to the connection point of first reactance means 2 and capacitive means 3. Then, the reactance values of first and second reactance means 2, 5 have been set so as to make the combined admittance, seen from the alternating current signal supply point toward the side of first reactance element 2 and second reactance element 5, zero.
摘要:
In a quadrature hybrid circuit which has first and second two-port circuits 11 and 12 inserted between I/O ports P1 and P2 and between I/O ports P4 and P3, respectively, and third and fourth two-port circuits inserted between I/O ports P1 and P4 and between I/O ports P2 and P3, respectively, and which is configured so that under the condition that the I/O ports P1 to P4 are matched, a high-frequency signal fed via the I/O port P1 is divided between the I/O ports P2 and P3 and the divided two signals are output 90° out of phase with each other but no signal is provided to the I/O ports P4, there are provided SPST switches 7 and 8 responsive to external control to control electromagnetic connections or coupling across a plane of symmetry 5 of the quadrature hybrid circuit passing through intermediate points of symmetry 23 and 24 of the third and fourth two-port circuits 21 and 22.