SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHODS FOR THEM
    42.
    发明申请
    SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHODS FOR THEM 有权
    半导体衬底,半导体器件及其制造方法

    公开(公告)号:US20110269284A1

    公开(公告)日:2011-11-03

    申请号:US13150620

    申请日:2011-06-01

    IPC分类号: H01L21/336

    摘要: The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

    摘要翻译: 本发明提供了一种半导体衬底,其包括单晶Si衬底,其包括具有沟道区,源极区和漏极区的有源层,所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度,LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此,通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件,简化了制造单晶硅的工艺。 此外,上述结构提供半导体衬底及其制造方法,当将单晶硅半导体元件转印到大绝缘衬底上时,确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

    Semiconductor substrate, semiconductor device, and manufacturing methods for them
    43.
    发明授权
    Semiconductor substrate, semiconductor device, and manufacturing methods for them 有权
    半导体衬底,半导体器件及其制造方法

    公开(公告)号:US07528446B2

    公开(公告)日:2009-05-05

    申请号:US11086680

    申请日:2005-03-23

    IPC分类号: H01L27/01

    摘要: The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

    摘要翻译: 本发明提供了一种半导体衬底,其包括单晶Si衬底,其包括具有沟道区,源极区和漏极区的有源层,所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度,LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此,通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件,简化了制造单晶硅的工艺。 此外,上述结构提供半导体衬底及其制造方法,当将单晶硅半导体元件转印到大绝缘衬底上时,确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

    Method for fabricating semiconductor device and semiconductor device
    44.
    发明授权
    Method for fabricating semiconductor device and semiconductor device 有权
    制造半导体器件和半导体器件的方法

    公开(公告)号:US07425475B2

    公开(公告)日:2008-09-16

    申请号:US11199166

    申请日:2005-08-09

    IPC分类号: H01L21/00

    摘要: A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

    摘要翻译: 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法,该半导体器件包括:衬底层,该衬底层包括多个第一区域,每个第一区域具有有源区域和多个第二区域, 地区。 制造方法包括隔离绝缘膜形成步骤,在每个第二区域中形成隔离绝缘膜,使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤,在隔离绝缘膜形成步骤之后,通过将氢离子注入到衬底层中形成剥离层,以及分离步骤,用于沿剥离层分离衬底层的一部分。

    Method for fabricating semiconductor device and semiconductor device
    45.
    发明申请
    Method for fabricating semiconductor device and semiconductor device 有权
    制造半导体器件和半导体器件的方法

    公开(公告)号:US20060043485A1

    公开(公告)日:2006-03-02

    申请号:US11199166

    申请日:2005-08-09

    IPC分类号: H01L21/84 H01L27/12 H01L21/30

    摘要: A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

    摘要翻译: 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法,该半导体器件包括:衬底层,该衬底层包括多个第一区域,每个第一区域具有有源区域和多个第二区域, 地区。 制造方法包括隔离绝缘膜形成步骤,在每个第二区域中形成隔离绝缘膜,使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤,在隔离绝缘膜形成步骤之后,通过将氢离子注入到衬底层中形成剥离层,以及分离步骤,用于沿剥离层分离衬底层的一部分。

    Semiconductor substrate, semiconductor device, and manufacturing methods for them

    公开(公告)号:US08563406B2

    公开(公告)日:2013-10-22

    申请号:US12416240

    申请日:2009-04-01

    IPC分类号: H01L21/322

    摘要: The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

    Semiconductor device fabrication method and semiconductor device
    47.
    发明授权
    Semiconductor device fabrication method and semiconductor device 有权
    半导体器件制造方法和半导体器件

    公开(公告)号:US07829400B2

    公开(公告)日:2010-11-09

    申请号:US11792487

    申请日:2005-11-15

    IPC分类号: H01L21/8234

    摘要: In fabricating a semiconductor device, an element forming surface formation step of forming a plurality of element forming surfaces of different heights on a semiconductor layer to have different levels, a semiconductor element formation step of forming a plurality of semiconductor elements and, one in each of a corresponding number of regions of the semiconductor layer, each region including an associated one of the plurality of element forming surfaces, a level-difference compensation insulating film formation step of forming a level-difference compensation insulating film on the semiconductor layer to cover the semiconductor elements and have a surface with different levels along the element forming surfaces, a release layer formation step of forming a release layer in the semiconductor layer by ion-implanting a peeling material through the level-difference compensation insulating film into the semiconductor layer, and a separation step of separating part of the semiconductor layer along the release layer are performed.

    摘要翻译: 在制造半导体器件时,在半导体层上形成具有不同高度的多个元件形成表面以形成不同电平的元件形成表面形成步骤,形成多个半导体元件的半导体元件形成步骤和 所述半导体层的相应数量的区域,每个区域包括所述多个元件形成表面中的相关联的一个元件形成表面;电平差补偿绝缘膜形成步骤,在所述半导体层上形成电平差补偿绝缘膜以覆盖所述半导体 元件,并且具有沿着元件形成表面具有不同水平的表面;剥离层形成步骤,通过将剥离材料通过电位差补偿绝缘膜离子注入到半导体层中而在半导体层中形成剥离层,以及 分离半导体层的一部分的分离步骤 沿着释放层进行。

    Method for fabricating semiconductor device and semiconductor device

    公开(公告)号:US20080318390A1

    公开(公告)日:2008-12-25

    申请号:US12222598

    申请日:2008-08-12

    IPC分类号: H01L21/76

    摘要: A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

    Nanowire transistor and method for forming same
    50.
    发明授权
    Nanowire transistor and method for forming same 有权
    纳米线晶体管及其形成方法

    公开(公告)号:US07935599B2

    公开(公告)日:2011-05-03

    申请号:US11732675

    申请日:2007-04-04

    摘要: A method is provided for removing reentrant stringers in the fabrication of a nanowire transistor (NWT). The method provides a cylindrical nanostructure with an outside surface axis overlying a substrate surface. The nanostructure includes an insulated semiconductor core. A conductive film is conformally deposited overlying the nanostructure, to function as a gate strap or a combination gate and gate strap. A hard mask insulator is deposited overlying the conductive film and selected regions of the hard mask are anisotropically plasma etched. As a result, a conductive film gate electrode is formed substantially surrounding a cylindrical section of nanostructure. Inadvertently, conductive film reentrant stringers may be formed adjacent the nanostructure outside surface axis, made from the conductive film. The method etches, and so removes the conductive film reentrant stringers.

    摘要翻译: 提供了一种用于在制造纳米线晶体管(NWT)中去除可折入桁条的方法。 该方法提供了一种圆柱形纳米结构,其外表面轴线覆盖在基底表面上。 纳米结构包括绝缘半导体芯。 导电膜共形沉积在纳米结构上方,用作栅极带或组合栅极和栅极带。 沉积覆盖导电膜的硬掩模绝缘体,硬掩模的选定区域是各向异性等离子体蚀刻。 结果,基本上围绕纳米结构的圆柱形部分形成导电膜栅电极。 无意中,可以形成与由导电膜制成的外表面轴线附近的导电膜折入桁条。 该方法蚀刻,因此去除导电膜可折入桁条。