公开(公告)号：US20220028990A1

公开(公告)日：2022-01-27

申请号：US17104218

申请日：2020-11-25

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Nan WANG

IPC分类号： H01L29/417 ,  H01L29/40 ,  H01L29/66 ,  H01L29/06 ,  H01L21/033

摘要： A semiconductor structure and a method for forming the same are provided. One form of a forming method includes: providing a base, the base including a device region and a dummy device region, the base including an isolation layer, gate structures located on the isolation layer, a first mask layer located on the gate structures, a source-drain plug located between the gate structures and on the isolation layer, and a second mask layer located on the source-drain plug. In implementations of the present disclosure, the first mask layer and the second mask layer on the dummy device region are separately removed. Correspondingly, the first opening and the second opening respectively expose the gate structures and the source-drain plug in the dummy device region. The gate structures exposed by the first opening and the source-drain plug exposed by the second opening are removed in the same step. The gate groove at the bottom of the first opening and the source-drain groove at the bottom of the second opening are formed at the same time. Correspondingly, a dielectric layer may be formed in the gate groove and the source-drain groove in the same step. The dielectric layer may block the gate structures and the source-drain plug at the same time. This is advantageous for simplifying the formation process of the semiconductor structure.

公开(公告)号：US20220005940A1

公开(公告)日：2022-01-06

申请号：US17335349

申请日：2021-06-01

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Yang LIU

IPC分类号： H01L29/66 ,  H01L23/535 ,  H01L29/78 ,  H01L29/45 ,  H01L21/285 ,  H01L21/768

摘要： A semiconductor device and a forming method thereof are provided. The forming method includes forming an initial dummy gate structure on a substrate. The initial dummy gate structure extends along a first direction. The forming method also includes forming a source/drain doped layer in the substrate on two sides of the initial dummy gate structure, forming an initial conductive layer on the source/drain doped layer and covering a sidewall and a top surface of the source/drain doped layer, and after forming the initial conductive layer, removing the initial dummy gate structure.

公开(公告)号：US20220005931A1

公开(公告)日：2022-01-06

申请号：US17315740

申请日：2021-05-10

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Nan WANG

IPC分类号： H01L29/423 ,  H01L29/06 ,  H01L29/49 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66

摘要： A semiconductor device and a forming method thereof are provided. The semiconductor device includes a substrate, a fin located on the substrate, and a gate structure located on the substrate and across the fin. The fin includes a first region, and the fin of the first region includes a gate groove and a channel layer located between adjacent gate grooves. The gate structure covers a sidewall and a top of the fin of the first region, fills the gate groove and surrounds the channel layer. A width of the gate structure located in the gate groove is smaller than a width of the gate structure located on the top of the fin of the first region.

公开(公告)号：US20210398974A1

公开(公告)日：2021-12-23

申请号：US17234061

申请日：2021-04-19

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Nan WANG

IPC分类号： H01L27/088 ,  H01L29/423 ,  H01L21/8234

摘要： A semiconductor device and a fabrication method are provided. The semiconductor device includes: a base substrate; a gate structure on the base substrate including a first portion in a first region and a second portion in a second region; and a separation section in the first portion of the gate structure in the first region. A length of the first portion of the gate structure in the first region is larger than a length of the second portion of the gate structure in the second region. A top surface of the separation section is higher than a top surface of the gate structure.

公开(公告)号：US11205596B2

公开(公告)日：2021-12-21

申请号：US15814280

申请日：2017-11-15

申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION ,  SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

发明人： Qiuhua Han ,  Longjuan Tang

IPC分类号： H01L29/417 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423

摘要： A method of manufacturing a semiconductor device includes providing a substrate structure, which includes a substrate, one or more semiconductor fins on the substrate, a gate structure on each fin, an active region located in said fins, and an interlayer dielectric layer covering at the active region. The method includes forming a hard mask layer over the interlayer dielectric layer and the gate structure, and using an etch process with a patterned etch mask, forming a first contact hole extending through the hard mask layer and extending into a portion of the interlayer dielectric layer, using patterned a mask. The method further includes forming a sidewall dielectric layer on sidewalls of the first contact hole, and using an etch process with the sidewall dielectric layer as an etch mask, etching the interlayer dielectric layer at bottom of the first contact hole to form a second contact hole extending to the active region.

公开(公告)号：US20210391432A1

公开(公告)日：2021-12-16

申请号：US17223238

申请日：2021-04-06

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Abraham YOO ,  Jisong JIN

IPC分类号： H01L29/417 ,  H01L23/535 ,  H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L21/768

摘要： A semiconductor structure and a forming method of a semiconductor structure are provided. One form of the forming method includes: providing a base, where a discrete gate structure is formed on the base, a spacer is formed on a side wall of the gate structure, and a source/drain doped layer is formed in the base on two sides of the gate structure, and a bottom dielectric layer covering the source/drain doped layer is formed on the two sides of the gate structure; forming a bottom source/drain plug running through the bottom dielectric layer above the source/drain doped layer, a source/drain cap layer located on a top surface of the bottom source/drain plug, a gate cap layer located on a top surface of the gate structure, and an etching barrier layer located between the gate cap layer and the source/drain cap layer and covering a top surface of the spacer; forming a top dielectric layer covering the gate cap layer, the source/drain cap layer, and the etching barrier layer on the bottom dielectric layer; forming a top source/drain plug that runs through the source/drain cap layer and the top dielectric layer and that is in contact with the bottom source/drain plug; and forming a gate plug that runs through the gate cap layer and the top dielectric layer and that is in contact with the gate structure. Embodiments of the present disclosure help improve the performance of the semiconductor structure.

公开(公告)号：US20210391173A1

公开(公告)日：2021-12-16

申请号：US17155483

申请日：2021-01-22

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Zhu CHEN ,  He ZUOPENG ,  Yang MING ,  Yao Dalin ,  Bei DUOHUI

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/768

摘要： The present disclosure provides a semiconductor structure and a forming method thereof. One form of a forming method includes: providing a base; forming a plurality of discrete mandrel layers on the base, where an extending direction of the mandrel layers is a first direction, and a direction perpendicular to the first direction is a second direction; forming a plurality of spacer layers covering side walls of the mandrel layers; forming a pattern transfer layer on the base, where the pattern transfer layer covers side walls of the spacer layers; forming a first trench in the pattern transfer layer between adjacent spacer layers in the second direction; removing a mandrel layer to form a second trench after the first trench is formed; and etching the base along the first trench and the second trench to form a target pattern by using the pattern transfer layer and the spacer layer as a mask. In the present disclosure, the accuracy of the pattern transfer is improved.

公开(公告)号：US11201088B2

公开(公告)日：2021-12-14

申请号：US16930878

申请日：2020-07-16

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Hu Wang ,  Shan Shan Wang ,  Feng Qiu ,  Wei Hu Zhang

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/8234 ,  H01L29/423 ,  H01L21/02 ,  H01L27/088 ,  H01L21/311 ,  H01L21/3213

摘要： A method for forming a semiconductor device includes providing a substrate, forming an oxide layer over the substrate, forming a plurality of first gate oxide layers by etching the oxide layer, forming a second gate oxide layer between adjacent first gate oxide layers, forming a silicon layer over the plurality of first gate oxide layers and the second gate oxide layer, and etching the plurality of first gate oxide layers, the silicon layer, and the second gate oxide layer to expose the substrate, thereby forming a plurality of gate structures. The first gate oxide layer of the plurality of first gate oxide layers has sloped sidewalls. A thickness of the second gate oxide layer is less than a thickness of the first gate oxide layer. Each gate structure includes an etched first oxide layer, a portion of the second gate oxide layer, and a portion of the silicon layer.

公开(公告)号：US11183395B2

公开(公告)日：2021-11-23

申请号：US16855059

申请日：2020-04-22

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Linlin Sun ,  Bo Su

IPC分类号： H01L21/311

摘要： A semiconductor device and its fabrication method are provided. The method includes forming a core layer on a first region of a base substrate layer; forming sidewall spacer layers on sidewalls of two sides of the core layer along a first direction; forming a filling layer on a second region between adjacent sidewall spacer layers which are arranged along the first direction; forming a first dividing trench in the filling layer on the second region to divide the filling layer along a second direction, where sidewalls of the first dividing trench, arranged along the first direction, expose corresponding sidewall spacer layers; forming a second dividing trench in the core layer to divide the core layer along the second direction; forming a second dividing layer in the second dividing trench when forming a first dividing layer in the first dividing trench; and removing the filling layer and the core layer.

公开(公告)号：US20210358912A1

公开(公告)日：2021-11-18

申请号：US17322472

申请日：2021-05-17

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Shuaijie CHI ,  Haiyang ZHANG ,  Ermin CHONG ,  Wei TIAN

IPC分类号： H01L27/092 ,  H01L29/66 ,  H01L29/06 ,  H01L21/8234

摘要： Semiconductor structures and fabrication methods thereof are provided. The semiconductor includes a substrate; a gate structure on the substrate; and a dielectric layer on the substrate and covering sidewall surfaces of the gate structure. The dielectric layer includes an opening passing through the gate structure along a direction perpendicular to an extending direction of the gate structure. The semiconductor structure also includes a first isolation layer in the opening and with a top surface lower than a top surface of the gate structure.