公开(公告)号：US07670831B2

公开(公告)日：2010-03-02

申请号：US10860544

申请日：2004-06-03

申请人： Sang Yup Lee ,  Hee Tae Jung ,  Dae Hwan Jung ,  Young Koan Ko ,  Do Hyun Kim ,  Seok Jae Lee ,  Byung Hun Kim ,  Jae Shin Lee

发明人： Sang Yup Lee ,  Hee Tae Jung ,  Dae Hwan Jung ,  Young Koan Ko ,  Do Hyun Kim ,  Seok Jae Lee ,  Byung Hun Kim ,  Jae Shin Lee

IPC分类号： C12M1/00 ,  C12Q1/00 ,  C12Q1/68 ,  C12M1/34

CPC分类号： G01N33/5438 ,  B82Y30/00 ,  C12Q1/001 ,  G01N33/551 ,  Y10S977/742 ,  Y10S977/745 ,  Y10S977/746 ,  Y10S977/747 ,  Y10S977/748 ,  Y10T156/10

摘要： Conductive carbon nanotubes (CNTs) obtained by dotting carboxylated CNTs with metal nanocrystals by chemical functional groups, are described, as well as a method for fabricating a pattern or film of the conductive CNTs which involves repeatedly depositing conductive CNTs on a substrate to achieve high surface density. A biosensor is described, in which bioreceptors that bind to target biomolecules are selectively attached to conductive CNTs or a conductive CNT pattern or film. By use of the conductive biosensor, various target biomaterials that bind or react with the bioreceptors can be precisely measured directly or by electrochemical signals at large amounts in one step. Additionally, the biosensor can be used for an electrical detection method capable of providing precise measurement results even with a small amount of source material.

摘要翻译： 描述了通过化学官能团将金属纳米晶体的羧化CNT点缀的导电碳纳米管（CNT），以及用于制造导电CNT的图案或膜的方法，其包括在基板上反复沉积导电CNT以实现高表面 密度。 描述了生物传感器，其中结合靶生物分子的生物感受器选择性地连接到导电CNT或导电CNT图案或膜。 通过使用导电生物传感器，可以在一个步骤中直接或通过大量的电化学信号精确测量与生物感受器结合或反应的各种靶生物材料。 此外，生物传感器可以用于即使使用少量源材料也能够提供精确测量结果的电检测方法。

公开(公告)号：US20100017656A1

公开(公告)日：2010-01-21

申请号：US12455207

申请日：2009-05-29

申请人： Jin-kwon Park ,  Cheon-su Lee ,  Jae-shin Lee ,  Min-Joung Lee

发明人： Jin-kwon Park ,  Cheon-su Lee ,  Jae-shin Lee ,  Min-Joung Lee

IPC分类号： G06F11/273

CPC分类号： G06F11/261

摘要： A system on a chip (SoC) device verification system comprises: an SoC device model including one or more IPs and a memory controller; an external IP verification model receiving an instruction from the SoC device model and verifying operation of the one or more IPs included in the SoC device model; and a bus select model selecting one of the external IP verification model and an external device in response to a memory control signal received from the memory controller of the SoC device model.

摘要翻译： 芯片系统（SoC）设备验证系统包括：包括一个或多个IP的SoC设备模型和存储器控制器; 接收来自SoC设备模型的指令并验证包括在SoC设备模型中的一个或多个IP的操作的外部IP验证模型; 以及总线选择模型，响应于从所述SoC设备模型的存储器控​​制器接收的存储器控​​制信号，选择外部IP验证模型和外部设备之一。

公开(公告)号：US20080215781A1

公开(公告)日：2008-09-04

申请号：US12025479

申请日：2008-02-04

申请人： Jae-Shin Lee ,  Cheon-Su Lee ,  Jin-Kwon Park

发明人： Jae-Shin Lee ,  Cheon-Su Lee ,  Jin-Kwon Park

IPC分类号： G06F13/18

CPC分类号： G06F13/4022

摘要： A system has a first chip using a first bus matrix, and a second chip including second and third bus matrixes connected to the first bus matrix. The second bus matrix is connected to a plurality of bus masters of the second chip and the third bus matrix is connected to a plurality of bus slaves of the second chip.

摘要翻译： 系统具有使用第一总线矩阵的第一芯片，以及包括连接到第一总线矩阵的第二和第三总线矩阵的第二芯片。 第二总线矩阵连接到第二芯片的多个总线主机，并且第三总线矩阵连接到第二芯片的多个总线从站。

公开(公告)号：US20080191331A1

公开(公告)日：2008-08-14

申请号：US11891908

申请日：2007-08-14

申请人： Cheon-su Lee ,  Jin-kwon Park ,  Jae-shin Lee

发明人： Cheon-su Lee ,  Jin-kwon Park ,  Jae-shin Lee

IPC分类号： H01L23/50 ,  G06F1/26 ,  G06F1/32

CPC分类号： G06F1/32 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014

摘要： Provided are a system in package (SIP) semiconductor device suitable for efficient power management, and a method of managing power of the SIP semiconductor device. The SIP semiconductor device includes chips including first and second chips. Each of the chips includes an alive block, a local interface, and an intellectual property (IP) block. The alive block is continuously supplied with power in order to continuously be in an on-state. The local interface transmits/receives data to/from other chips. The IP block individually stores and processes data. The alive blocks of the chips are connected to each other through a first signal line unit for transmitting a signal required to wake up or initialize the chips. The alive blocks control power to the chips, respectively, in response to an external wake-up instruction signal or the signal transmitted through the first signal line unit. Therefore, power can be efficiently managed since power that is supplied to the chips of the SIP semiconductor device is managed by the alive blocks or the local interfaces of the chips.

摘要翻译： 提供适用于高效电源管理的系统级封装（SIP）半导体器件，以及管理SIP半导体器件的功率的方法。 SIP半导体器件包括包括第一和第二芯片的芯片。 每个芯片包括活动块，本地接口和知识产权（IP）块。 活体块连续供电，以连续地处于开状态。 本地接口向/从其他芯片发送/接收数据。 IP块分别存储和处理数据。 芯片的活动块通过第一信号线单元相互连接，用于发送唤醒或初始化芯片所需的信号。 活动块分别响应于外部唤醒指令信号或通过第一信号线单元传输的信号来分别控制芯片的功率。 因此，由于提供给SIP半导体器件的芯片的功率由芯片的活动块或本地接口进行管理，所以可以有效地管理功率。

公开(公告)号：US20060239452A1

公开(公告)日：2006-10-26

申请号：US11386782

申请日：2006-03-23

申请人： Dong-shin Jung ,  Joo-yeol Lee ,  Jae-shin Lee

发明人： Dong-shin Jung ,  Joo-yeol Lee ,  Jae-shin Lee

IPC分类号： H04L9/00

CPC分类号： H04L63/062 ,  H04L63/0442 ,  H04L63/08 ,  H04L63/101

摘要： An apparatus for providing a security service includes a key generation unit which generates a pair of keys including a first temporary public key and a first temporary private key for a network device that will be connected with a network form the outside, a temporary access control list generation unit which generates a first temporary access control list including the first temporary public key for an internal network device, an authentication unit which performs authentication when the network device joins in the network, and a first transmission/reception unit which transmits the pair of keys including the first temporary public key and the first temporary private key to the network device according to the authentication result.

摘要翻译： 一种用于提供安全服务的装置包括密钥生成单元，其生成包括第一临时公钥和用于将从外部与网络连接的网络设备的第一临时私钥对的一对密钥，临时访问控制列表 生成包含内部网络装置的第一临时公开密钥的第一临时访问控制列表，网络装置在网络中进行认证的认证单元以及发送该对密钥的第一发送/接收单元 包括根据认证结果向网络设备发送第一临时公钥和第一临时私钥。

公开(公告)号：US4910797A

公开(公告)日：1990-03-20

申请号：US160922

申请日：1988-02-26

申请人： Sung-Ki Min ,  Chan-Kyu Myung ,  Jae-Shin Lee

发明人： Sung-Ki Min ,  Chan-Kyu Myung ,  Jae-Shin Lee

IPC分类号： H03G3/00 ,  H03G3/20 ,  H03G3/30

CPC分类号： H03G3/30 ,  H03G3/001

摘要： A digital automatic gain control system for maintaining a constant output level through attenuating or amplifying an input signal is disclosed. The system includes a gain control providing an output signal by amplifying or attenuating an input signal in a step mode in response to digital data of a data bus, a comparator deciding with a digital output whether or not said output signal is within a window reference voltage range, a stage preventing a malfunction due to noise by means of performing a counting operation upon receiving said digital output, a clock generating a clock pulse and dividing the frequency of the clock pulse, whereby there is provided a divided clock in case of performing an up counting operation and to the contrary there is provided the non-divided clock pulse in case of performing a down counting operation, and generating a reset clock delayed by a specified time interval from said clock, a latch adapted to receive and thereby latch an output of preventing stage malfunction, and reset clock and up/down counting and logic performing the up or down counting operation by receiving said clock and a latch signal.

摘要翻译： 公开了一种通过衰减或放大输入信号来保持恒定输出电平的数字自动增益控制系统。 该系统包括增益控制，通过响应于数据总线的数字数据以步进模式放大或衰减输入信号来提供输出信号，比较器用数字输出判定所述输出信号是否在窗口参考电压内 范围，通过在接收到所述数字输出时执行计数操作来防止由于噪声引起的故障的阶段，产生时钟脉冲并且分频时钟脉冲的频率的时钟，从而在执行时钟脉冲的情况下提供分频时钟 相反，在执行递减计数操作的情况下提供非分时钟脉冲，并且从所述时钟产生延迟指定时间间隔的复位时钟，适于接收并由此锁存输出的锁存器 通过接收所述时钟和锁存符号来复位时钟和上/下计数以及执行向上或向下计数操作的逻辑 al。

公开(公告)号：US08890431B2

公开(公告)日：2014-11-18

申请号：US13220041

申请日：2011-08-29

申请人： Change Seok Lee ,  Yeun Joong Lee ,  Deuk Hee Park ,  Sang Hyun Cha ,  Jae Shin Lee

发明人： Change Seok Lee ,  Yeun Joong Lee ,  Deuk Hee Park ,  Sang Hyun Cha ,  Jae Shin Lee

IPC分类号： H05B37/02 ,  H05B33/08

CPC分类号： H05B33/0815

摘要： There are provided an LED driving apparatus and an LED driving method thereof. The LED driving apparatus includes: a light emitting unit including one or more LEDs, a rectifying unit rectifying an input signal to generate a first signal; a signal conversion unit inverting a waveform of a first signal to generate a second signal; and an operation unit arithmetically operating the first and second signals. A plurality of AC signals each having a different waveform are arithmetically operated to generate a signal having a small amount of a ripple component, and an LED is driven by the signal, thus preventing a lifespan of the LED from being shortened by omitting a smoothing electrolytic capacitor, one of main causes shortening the lifespan of an LED driving circuit.

摘要翻译： 提供了LED驱动装置及其LED驱动方法。 LED驱动装置包括：发光单元，包括一个或多个LED;整流单元对输入信号进行整流以产生第一信号; 信号转换单元，反转第一信号的波形以产生第二信号; 以及操作单元，算术地操作第一和第二信号。 每个具有不同波形的多个AC信号被算术运算以产生具有少量纹波分量的信号，并且由信号驱动LED，从而通过省略平滑电解而防止LED的寿命缩短 电容器，主要原因之一是缩短了LED驱动电路的使用寿命。

公开(公告)号：US08791677B2

公开(公告)日：2014-07-29

申请号：US13162793

申请日：2011-06-17

申请人： Jeong Mo Yang ,  Chang Sik Yoo ,  Yung Jin Moon ,  Yong Seong Roh ,  Joong Ho Choi ,  Jae Shin Lee ,  Jung Chul Gong ,  Yu Jin Jang

发明人： Jeong Mo Yang ,  Chang Sik Yoo ,  Yung Jin Moon ,  Yong Seong Roh ,  Joong Ho Choi ,  Jae Shin Lee ,  Jung Chul Gong ,  Yu Jin Jang

IPC分类号： H02M3/156

CPC分类号： H02M1/4225 ,  Y02B70/126 ,  Y02P80/112

摘要： There is provided a power factor correction circuit capable of correcting a power factor of a power converting module through increasing an input current by switching a main switching element of a power converting module on the basis of a first reference wave having a slope based on a first signal and an error voltage, in particular, by limiting a switching frequency on the basis of a first reference wave having a slope based on a second signal lower than a first signal and an error voltage when the switching frequency of the main switching element increases because an input voltage of the power converting module is low.

摘要翻译： 提供了一种功率因数校正电路，其能够通过增加输入电流来校正功率转换模块的功率因数，所述功率因数校正电路通过基于第一参考波来切换功率转换模块的主开关元件，所述第一基准波具有基于第一 信号和误差电压，特别是通过基于具有基于低于第一信号的第二信号的斜率的第一参考波和当主开关元件的开关频率增加时的误差电压来限制开关频率，因为 电力转换模块的输入电压低。

公开(公告)号：US20130249424A1

公开(公告)日：2013-09-26

申请号：US13494497

申请日：2012-06-12

申请人： Jung Eui PARK ,  Seung Kon Kong ,  Joon Youp Sung ,  Jae Shin Lee ,  Jin Soo Lee ,  Jung Sun Kwon

发明人： Jung Eui PARK ,  Seung Kon Kong ,  Joon Youp Sung ,  Jae Shin Lee ,  Jin Soo Lee ,  Jung Sun Kwon

IPC分类号： H05B37/02

CPC分类号： H05B33/0827 ,  H05B33/0851

摘要： There is provided a light emitting diode driving apparatus capable of uniformly controlling current balance between light emitting diode channels. The light emitting diode driving apparatus includes: an AC to DC converting unit converting input AC power into a preset DC driving power; a detecting unit detecting voltage drops generated in a plurality of respective light emitting diode channels each having a plurality of light emitting diodes performing a light emitting operation by receiving the DC driving power; a converting unit converting analog values detected from the detecting unit into digital values; and a driving unit differentially setting switching signal duty cycles in which a driving current is allowed to flow in the plurality of respective light emitting diode channels according to the digital values from the converting unit to drive the plurality of light emitting diode channels.

摘要翻译： 提供了能够均匀地控制发光二极管通道之间的电流平衡的发光二极管驱动装置。 发光二极管驱动装置包括：将输入AC电力转换为预设的DC驱动电力的AC至DC转换单元; 检测单元，检测多个各自的发光二极管通道中产生的电压降，每个发光二极管通道具有通过接收直流驱动功率而执行发光操作的多个发光二极管; 转换单元，将从检测单元检测的模拟值转换为数字值; 以及驱动单元，根据来自转换单元的数字值，差分地设置允许驱动电流在多个相应的发光二极管通道中流动的开关信号占空比，以驱动多个发光二极管通道。

公开(公告)号：US08519637B2

公开(公告)日：2013-08-27

申请号：US13069558

申请日：2011-03-23

申请人： Jung Hyun Kim ,  Bo Hyun Hwang ,  Jung Sun Kwon ,  Seung Kon Kong ,  Jae Shin Lee ,  Joon Youp Sung

发明人： Jung Hyun Kim ,  Bo Hyun Hwang ,  Jung Sun Kwon ,  Seung Kon Kong ,  Jae Shin Lee ,  Joon Youp Sung

IPC分类号： H05B37/02

CPC分类号： H05B33/0842 ,  H05B33/0818 ,  H05B33/0824 ,  Y02B20/346

摘要： There is provided a digital PWM generator according to a first exemplary embodiment of the present invention including: an A/D converter dividing a predetermined reference voltage into a plurality of sections corresponding to a predetermined first set value, searching a section to which the magnitude of an input voltage Vin corresponds, among the plurality of sections, and converting a value corresponding to the searched section into a digital signal; a frequency selector providing a counting number by counting a predetermined high-speed counting clock during a one-cycle section of a predetermined reference clock; and a PWM signal generator converting the digital signal from the A/D converter into a ratio value corresponding to a ratio for the reference voltage and generating a PWM signal having a controlled duty ratio of the reference clock by using the ratio value and the counting number from the frequency selector.

摘要翻译： 提供了根据本发明的第一示例性实施例的数字PWM发生器，包括：A / D转换器，将预定的参考电压分成对应于预定的第一设定值的多个部分， 在多个部分中，输入电压Vin对应于将与搜索到的部分相对应的值转换为数字信号; 频率选择器，通过在预定参考时钟的一个周期段内对预定的高速计数时钟进行计数来提供计数数; 以及PWM信号发生器，其将来自A / D转换器的数字信号转换成与参考电压的比率相对应的比值，并通过使用比值和计数数来产生具有参考时钟的受控占空比的PWM信号 从频率选择器。