公开(公告)号：US20070128867A1

公开(公告)日：2007-06-07

申请号：US11672363

申请日：2007-02-07

申请人： Anthony Domenicucci ,  Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun Wang ,  Kwong Wong

发明人： Anthony Domenicucci ,  Bradley Jones ,  Christian Lavoie ,  Robert Purtell ,  Yun Wang ,  Kwong Wong

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L21/28518 ,  H01L29/665

摘要： The present invention provides a method for enhancing uni-directional diffusion of a metal during silicidation by using a metal-containing silicon alloy in conjunction with a first anneal in which two distinct thermal cycles are performed. The first thermal cycle of the first anneal is performed at a temperature that is capable of enhancing the uni-directional diffusion of metal, e.g., Co and/or Ni, into a Si-containing layer. The first thermal cycle causes an amorphous metal-containing silicide to form. The second thermal cycle is performed at a temperature that converts the amorphous metal-containing silicide into a crystallized metal rich silicide that is substantially non-etchable as compared to the metal-containing silicon alloy layer or a pure metal-containing layer. Following the first anneal, a selective etch is performed to remove any unreacted metal-containing alloy layer from the structure. A second anneal is performed to convert the metal rich silicide phase formed by the two thermal cycles of the first anneal into a metal silicide phase that is in its lowest resistance phase. A metal silicide is provided whose thickness is self-limiting.

摘要翻译： 本发明提供了一种通过使用含金属的硅合金与进行两个不同的热循环的第一次退火相结合的方法来增强金属在硅化过程中的单向扩散。 第一退火的第一热循环在能够增强金属例如Co和/或Ni的单向扩散到含Si层中的温度下进行。 第一热循环导致形成含非晶态金属的硅化物。 第二热循环在将含非晶态金属的硅化物转化为与含金属的硅合金层或纯金属含有层相比基本上不可蚀刻的结晶的富含金属的硅化物的温度下进行。 在第一退火之后，执行选择性蚀刻以从结构中除去任何未反应的含金属合金层。 执行第二退火以将由第一退火的两个热循环形成的富金属硅化物相转换成处于其最低电阻相的金属硅化物相。 提供了一种金属硅化物，其厚度是自限制的。

公开(公告)号：US07119012B2

公开(公告)日：2006-10-10

申请号：US10838377

申请日：2004-05-04

申请人： Roy A. Carruthers ,  Cedrik Y. Coia ,  Christophe Detavernier ,  Christian Lavoie ,  Kenneth P. Rodbell

发明人： Roy A. Carruthers ,  Cedrik Y. Coia ,  Christophe Detavernier ,  Christian Lavoie ,  Kenneth P. Rodbell

IPC分类号： H01L21/44

CPC分类号： H01L21/28052 ,  H01L21/28518 ,  H01L29/665

摘要： A method for forming a stabilized metal silicide film, e.g., contact (source/drain or gate), that does not substantially agglomerate during subsequent thermal treatments, is provided. In the present invention, ions that are capable of attaching to defects within the Si-containing layer are implanted into the Si-containing layer prior to formation of metal silicide. The implanted ions stabilize the film, because the implants were found to substantially prevent agglomeration or at least delay agglomeration to much higher temperatures than in cases in which no implants were used.

摘要翻译： 提供了一种用于形成稳定的金属硅化物膜的方法，例如接触（源极/漏极或栅极），其在随后的热处理期间基本上不附聚。 在本发明中，在形成金属硅化物之前，将能够附着到含Si层内的缺陷的离子注入到含Si层中。 植入的离子稳定膜，因为发现植入物基本上防止结块或至少延迟聚集到比没有使用植入物的情况下更高的温度。

公开(公告)号：US20060121662A1

公开(公告)日：2006-06-08

申请号：US10904884

申请日：2004-12-02

申请人： Sunfei Fang ,  Cyril Cabral ,  Chester Dziobkowski ,  John Ellis-Monaghan ,  Christian Lavoie ,  Zhijiong Luo ,  James Nakos ,  An Steegen ,  Clement Wann

发明人： Sunfei Fang ,  Cyril Cabral ,  Chester Dziobkowski ,  John Ellis-Monaghan ,  Christian Lavoie ,  Zhijiong Luo ,  James Nakos ,  An Steegen ,  Clement Wann

IPC分类号： H01L21/8238 ,  H01L21/3205 ,  H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/823814 ,  H01L21/823835

摘要： A method of fabricating a complementary metal oxide semiconductor (CMOS) device, wherein the method comprises forming a first well region in a semiconductor substrate for accommodation of a first type semiconductor device; forming a second well region in the semiconductor substrate for accommodation of a second type semiconductor device; shielding the first type semiconductor device with a mask; depositing a first metal layer over the second type semiconductor device; performing a first salicide formation on the second type semiconductor device; removing the mask; depositing a second metal layer over the first and second type semiconductor devices; and performing a second salicide formation on the first type semiconductor device. The method requires only one pattern level and it eliminates pattern overlay as it also simplifies the processes to form different silicide material over different devices.

公开(公告)号：US20050110142A1

公开(公告)日：2005-05-26

申请号：US10722934

申请日：2003-11-26

申请人： Michael Lane ,  Christian Lavoie ,  Sandra Malhotra ,  Fenton McFeely ,  John Yurkas

发明人： Michael Lane ,  Christian Lavoie ,  Sandra Malhotra ,  Fenton McFeely ,  John Yurkas

IPC分类号： H01L21/285 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/48 ,  H01L23/532 ,  H01L29/40

CPC分类号： H01L21/76843 ,  H01L21/28556 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L2924/0002 ,  H01L2924/00

摘要： A solid state device includes a first material and a second material. A barrier layer is formed between the first material and the second material to prevent diffusion between the first material and the second material. The barrier layer includes a metal form of at least one of Ru and Re. The barrier layer is preferably formed using a low temperature deposition process, where the substrate is less than 400 degrees C.

摘要翻译： 固体装置包括第一材料和第二材料。 在第一材料和第二材料之间形成阻挡层以防止第一材料和第二材料之间的扩散。 阻挡层包括Ru和Re中的至少一种的金属形式。 阻挡层优选使用低温沉积工艺形成，其中衬底小于400℃。

公开(公告)号：US20050070098A1

公开(公告)日：2005-03-31

申请号：US10674645

申请日：2003-09-30

申请人： John Bruley ,  Cyril Cabral ,  Christian Lavoie ,  Tina Wagner ,  Yun Wang ,  Horatl Wlldman ,  Wong Hon

发明人： John Bruley ,  Cyril Cabral ,  Christian Lavoie ,  Tina Wagner ,  Yun Wang ,  Horatl Wlldman ,  Wong Hon

IPC分类号： H01L21/336 ,  H01L21/44 ,  H01L21/768 ,  H01L23/52

CPC分类号： H01L21/76843 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76855 ,  H01L21/76856 ,  H01L29/665

摘要： The present invention provides a method for forming an interconnect to a cobalt or nickel silicide having a TiN diffusion barrier. The inventive method comprises providing an initial structure having vias to exposed silicide regions positioned on a substrate; annealing the initial structure in a nitrogen-containing ambient, wherein a nitrogen passivation layer is formed atop the exposed silicide region; depositing Ti atop the nitrogen passivation layer; annealing the Ti in a nitrogen-containing ambient to form a TiN diffusion barrier and an amorphous Ti cobalt silicide between the TiN diffusion layer and the cobalt or nickel silicide and depositing an interconnect metal within the vias and atop the TiN diffusion barrier. The nitrogen passivation layer substantially restricts diffusion between the Ti and silicide layers minimizing the amorphous Ti cobalt silicide layer that forms. Therefore, the amorphous Ti cobalt or Ti nickel silicide is restricted to a thickness of less than about 3.0 nm.

摘要翻译： 本发明提供一种用于形成具有TiN扩散阻挡层的钴或镍硅化物的互连的方法。 本发明的方法包括提供具有通孔的初始结构，以暴露出位于基板上的硅化物区域; 在含氮环境中退火初始结构，其中在暴露的硅化物区域上形成氮钝化层; 在氮钝化层顶上沉积Ti; 在含氮环境中退火Ti以在TiN扩散层和钴或镍硅化物之间形成TiN扩散阻挡层和非晶Ti钴硅化物，并在通孔内和TiN扩散势垒顶上沉积互连金属。 氮钝化层基本上限制了Ti和硅化物层之间的扩散，使形成的无定形Ti钴硅化物层最小化。 因此，非晶Ti钴或Ti镍硅化物被限制在小于约3.0nm的厚度。

公开(公告)号：US06777298B2

公开(公告)日：2004-08-17

申请号：US10172649

申请日：2002-06-14

申请人： Ronnen A. Roy ,  Cyril Cabral, Jr. ,  Christian Lavoie ,  Kam-Leung Lee

发明人： Ronnen A. Roy ,  Cyril Cabral, Jr. ,  Christian Lavoie ,  Kam-Leung Lee

IPC分类号： H01L21336

CPC分类号： H01L29/66492 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/26586 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/324 ,  H01L29/41783 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6659 ,  Y10S438/924

摘要： In one embodiment of the invention, source and drain regions are formed as well as source and drain contact regions. Thereafter source and drain extension regions are formed. In another embodiment, elevated source and drain regions are formed as well as source and drain extension regions. Thereafter source and drain contact regions are formed at a temperature up to about 600° C. and an annealing time of up to about one minute.

摘要翻译： 在本发明的一个实施例中，形成源极和漏极区以及源极和漏极接触区域。 此后形成源极和漏极延伸区域。 在另一个实施例中，形成升高的源极和漏极区以及源极和漏极延伸区。 此后，源极和漏极接触区域形成在高达约600℃的温度和高达约1分钟的退火时间。

公开(公告)号：US06690072B2

公开(公告)日：2004-02-10

申请号：US10156782

申请日：2002-05-24

申请人： Cyril Cabral, Jr. ,  Roy A. Carruthers ,  Kevin K. Chan ,  Jack O. Chu ,  Guy Moshe Cohen ,  Steven J. Koester ,  Christian Lavoie ,  Ronnen A. Roy

发明人： Cyril Cabral, Jr. ,  Roy A. Carruthers ,  Kevin K. Chan ,  Jack O. Chu ,  Guy Moshe Cohen ,  Steven J. Koester ,  Christian Lavoie ,  Ronnen A. Roy

IPC分类号： H01L2904

CPC分类号： H01L29/41783 ,  H01L21/28518 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/161 ,  H01L29/665 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method (and structure) of forming a vertically-self-aligned silicide contact to an underlying SiGe layer, includes forming a layer of silicon of a first predetermined thickness on the SiGe layer and forming a layer of metal on the silicon layer, where the metal layer has a second predetermined thickness. A thermal annealing process at a predetermined temperature then forms a silicide of the silicon and metal, where the predetermined temperature is chosen to substantially preclude penetration of the silicide into the underlying SiGe layer.

摘要翻译： 形成垂直自对准的硅化物接触到下面的SiGe层的方法（和结构）包括在SiGe层上形成第一预定厚度的硅层，并在硅层上形成一层金属，其中 金属层具有第二预定厚度。 然后在预定温度下的热退火工艺形成硅和金属的硅化物，其中选择预定温度以基本排除硅化物渗透到下面的SiGe层中。

公开(公告)号：US20220005999A1

公开(公告)日：2022-01-06

申请号：US16918708

申请日：2020-07-01

申请人： Christian Lavoie ,  Benjamin Wymore ,  Markus Brink ,  Stephen L. Brown

发明人： Christian Lavoie ,  Benjamin Wymore ,  Markus Brink ,  Stephen L. Brown

IPC分类号： H01L39/12 ,  H01L39/24 ,  G06N10/00

摘要： Techniques facilitating formation of amorphous superconducting alloys for superconducting circuits are provided. A device can comprise one or more superconducting components that comprise an amorphous superconducting alloy comprising two or more elements. At least one element of the two or more elements is a superconducting element.

公开(公告)号：US10396229B2

公开(公告)日：2019-08-27

申请号：US13103583

申请日：2011-05-09

申请人： Joel P. De Souza ,  Harold J. Hovel ,  Daniel A. Inns ,  Jeehwan Kim ,  Christian Lavoie ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Davood Shahrjerdi ,  Zhen Zhang

发明人： Joel P. De Souza ,  Harold J. Hovel ,  Daniel A. Inns ,  Jeehwan Kim ,  Christian Lavoie ,  Devendra K. Sadana ,  Katherine L. Saenger ,  Davood Shahrjerdi ,  Zhen Zhang

IPC分类号： H01L31/07 ,  H01L31/0224 ,  H01L31/18 ,  H01L31/068

摘要： A solar cell having n-type and p-type interdigitated back contacts (IBCs), which cover the entire back surface of the absorber layer. The spatial separation of the IBCs is in a direction perpendicular to the back surface, thus providing borderless contacts having a zero-footprint separation. As the contacts are on the back, photons incident on the cell's front surface can be absorbed without any shadowing.

公开(公告)号：US09006801B2

公开(公告)日：2015-04-14

申请号：US13013081

申请日：2011-01-25

申请人： Christian Lavoie ,  Zhengwen Li ,  Ahmet S. Ozcan ,  Filippos Papadatos ,  Chengwen Pei ,  Jian Yu

发明人： Christian Lavoie ,  Zhengwen Li ,  Ahmet S. Ozcan ,  Filippos Papadatos ,  Chengwen Pei ,  Jian Yu

IPC分类号： H01L21/285 ,  H01L21/336 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L21/768

CPC分类号： H01L29/7833 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/28518 ,  H01L21/31116 ,  H01L21/32053 ,  H01L21/321 ,  H01L21/32133 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76829 ,  H01L23/535 ,  H01L29/1054 ,  H01L29/45 ,  H01L29/456 ,  H01L29/458 ,  H01L29/4975 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7843 ,  H01L29/7845 ,  H01L29/7849

摘要： A method of forming a semiconductor device is provided that includes forming a first metal semiconductor alloy on a semiconductor containing surface, forming a dielectric layer over the first metal semiconductor alloy, forming an opening in the dielectric layer to provide an exposed surface the first metal semiconductor alloy, and forming a second metal semiconductor alloy on the exposed surface of the first metal semiconductor alloy. In another embodiment, the method includes forming a gate structure on a channel region of a semiconductor substrate, forming a dielectric layer over at least a source region and a drain region, forming an opening in the dielectric layer to provide an exposed surface the semiconductor substrate, forming a first metal semiconductor alloy on the exposed surface of the semiconductor substrate, and forming a second metal semiconductor alloy on the first metal semiconductor alloy.

摘要翻译： 提供一种形成半导体器件的方法，包括在半导体容纳表面上形成第一金属半导体合金，在第一金属半导体合金上形成电介质层，在电介质层中形成开口以提供第一金属半导体 合金，并且在第一金属半导体合金的暴露表面上形成第二金属半导体合金。 在另一个实施例中，该方法包括在半导体衬底的沟道区上形成栅极结构，在至少源极区和漏极区上形成电介质层，在电介质层中形成开口以提供暴露表面，半导体衬底 在所述半导体衬底的暴露表面上形成第一金属半导体合金，并在所述第一金属半导体合金上形成第二金属半导体合金。