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公开(公告)号：US20120318338A1
公开(公告)日：2012-12-20
申请号：US13599577
申请日：2012-08-30
IPC分类号： H01L31/0236 , H01L31/076 , H01L31/075
CPC分类号： H01L31/1804 , H01L31/022425 , H01L31/02363 , H01L31/02366 , H01L31/0352 , H01L31/035227 , Y02E10/50
摘要： A photovoltaic device and method include depositing a metal film on a substrate layer. The metal film is annealed to form islands of the metal film on the substrate layer. The substrate layer is etched using the islands as an etch mask to form pillars in the substrate layer.
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公开(公告)号：US07679141B2
公开(公告)日：2010-03-16
申请号：US12027561
申请日：2008-02-07
申请人： Stephen W. Bedell , Huajie Chen , Anthony G. Domenicucci , Keith E. Fogel , Richard J. Murphy , Devendra K. Sadana
发明人： Stephen W. Bedell , Huajie Chen , Anthony G. Domenicucci , Keith E. Fogel , Richard J. Murphy , Devendra K. Sadana
IPC分类号： H01L31/392
CPC分类号： H01L21/26506 , H01L21/324 , H01L21/7624 , H01L21/76254 , H01L29/1054
摘要： A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.
摘要翻译： 提供一种形成低缺陷，基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤，并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散，从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外，由于加热步骤在接近最终SiGe合金的熔点的温度下进行，所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中，加热步骤包括氧化过程，其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。
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公开(公告)号：US07566482B2
公开(公告)日：2009-07-28
申请号：US10674648
申请日：2003-09-30
IPC分类号： C23C14/48 , C23C14/08 , C23C14/58 , H01L21/265 , H01L21/316
CPC分类号： H01L21/76245 , C25F3/04
摘要： A method in which a SOI substrate structure is fabricated by oxidation of graded porous Si is provided. The graded porous Si is formed by first implanting a dopant (p- or n-type) into a Si-containing substrate, activating the dopant using an activation anneal step and then anodizing the implanted and activated dopant region in a HF-containing solution. The graded porous Si has a relatively coarse top layer and a fine porous layer that is buried beneath the top layer. Upon a subsequent oxidation step, the fine buried porous layer is converted into a buried oxide, while the coarse top layer coalesces into a solid Si-containing over-layer by surface migration of Si atoms.
摘要翻译： 提供了通过分级多孔Si的氧化制造SOI衬底结构的方法。 通过首先将掺杂剂（p型或n型）注入到含Si衬底中，使用激活退火步骤激活掺杂剂，然后对含HF溶液中的注入和活化的掺杂剂区进行阳极化，形成渐变多孔Si。 分级多孔Si具有相对粗糙的顶层和埋在顶层下方的细多孔层。 在随后的氧化步骤中，精细埋入的多孔层被转化为掩埋氧化物，而粗顶层通过Si原子的表面迁移而结合成固体含Si的超层。
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54.发明授权Laser processing method for trench-edge-defect-free solid phase epitaxy in confined geometrics 失效激光加工方法用于封闭几何中的无边缘无缺陷固相外延公开(公告)号：US07547616B2
公开(公告)日：2009-06-16
申请号：US11406122
申请日：2006-04-18
IPC分类号： H01L21/20
CPC分类号： H01L21/02675 , H01L21/02532 , H01L21/2022 , H01L21/76224 , H01L21/823807
摘要： The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. In particular, this invention provides a melt-recrystallization ATR method, for use alone or in combination with non-melt-recrystallization ATR methods, in which selected Si regions bounded by dielectric-filled trenches are induced to undergo an orientation change by the steps of preamorphization, laser-induced melting, and corner-defect-free templated recrystallization from the melt.
摘要翻译： 本发明提供了用于制造低缺陷密度混合取向基材的改进的非晶化/模板重结晶（ATR）方法。 用于混合取向衬底制造的ATR方法通常从具有第一取向键合到具有第二取向的第二Si层或衬底的Si层开始。 第一Si层的选定区域是非晶化的，然后通过使用第二Si层作为模板将其再结晶成第二Si层的取向。 特别地，本发明提供熔融重结晶ATR方法，其单独使用或与非熔融再结晶ATR方法组合使用，其中通过介电填充沟槽界定的选定的Si区域被诱导通过以下步骤进行取向改变： 熔融前体变形，激光熔化和无角点缺陷的模板重结晶。
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55.发明授权Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost 有权用于形成半导体上孔（SOP）的结构和方法，用于高器件性能和低制造成本公开(公告)号：US07365399B2
公开(公告)日：2008-04-29
申请号：US11333074
申请日：2006-01-17
CPC分类号： H01L29/32 , H01L21/0203 , H01L21/76259 , H01L29/1033 , H01L29/1083 , H01L29/16 , H01L29/78
摘要： A semiconducting material that has all the advantages of prior art SOI substrates including, for example, low parasitic capacitance and leakage, without having floating body effects is provided. More specifically, the present invention provides a Semiconductor-on-Pores (SOP) material that includes a top semiconductor layer and a bottom semiconductor layer, wherein the semiconductor layers are separated in at least one region by a porous semiconductor material. Semiconductor structures including the SOP material as a substrate as well as a method of fabricating the SOP material are also provided. The method includes forming a p-type region with a first semiconductor layer, converting the p-type region to a porous semiconductor material, sealing the upper surface of the porous semiconductor material by annealing, and forming a second semiconductor layer atop the porous semiconductor material.
摘要翻译： 提供了具有现有技术的SOI衬底的所有优点的半导体材料，包括例如低寄生电容和泄漏，而不具有浮体效应。 更具体地说，本发明提供一种包括顶部半导体层和底部半导体层的半导体激光器（SOP）材料，其中半导体层通过多孔半导体材料在至少一个区域中分离。 还提供了包括作为基板的SOP材料的半导体结构以及制造SOP材料的方法。 该方法包括：形成具有第一半导体层的p型区域，将p型区域转换为多孔半导体材料，通过退火密封多孔半导体材料的上表面，以及在多孔半导体材料的顶部形成第二半导体层 。
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公开(公告)号：US06989058B2
公开(公告)日：2006-01-24
申请号：US10654232
申请日：2003-09-03
IPC分类号： C30B25/02
CPC分类号： H01L21/7624 , C30B29/52 , C30B31/02 , H01L21/02381 , H01L21/02532 , H01L21/02694 , Y10T428/24917
摘要： High-quality, metastable SiGe alloys are formed on SOI substrates having an SOI layer of about 500 Å or less, the SiGe layers can remain substantially fully strained compared to identical SiGe layers formed on thicker SOI substrates and subsequently annealed and/or oxidized at high temperatures. The present invention thus provides a method of ‘frustrating’ metastable strained SiGe layers by growing them on thin, clean and high-quality SOI substrates.
摘要翻译： 在具有大约等于或小于等于或等于SOI层的SOI层的SOI衬底上形成高质量的亚稳态SiGe合金，与形成在较厚SOI衬底上的相同SiGe层相比，SiGe层可以保持基本上完全变形，并随后在高温下退火和/或氧化 温度。 因此，本发明提供了一种通过在薄的，清洁的和高质量的SOI衬底上生长它们来“挫败”亚稳应变的SiGe层的方法。
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公开(公告)号：US06878611B2
公开(公告)日：2005-04-12
申请号：US10336147
申请日：2003-01-02
IPC分类号： H01L21/76 , H01L21/02 , H01L21/20 , H01L21/324 , H01L21/762 , H01L21/8238 , H01L27/12 , H01L21/36
CPC分类号： H01L21/324 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02658 , H01L21/02694 , H01L21/823807 , Y10S438/96
摘要： In the preferred embodiment of this invention a method is described to convert patterned SOI regions into patterned SGOI (silicon-germanium on oxide) by the SiGe/SOI thermal mixing process to further enhance performance of the logic circuit in an embedded DRAM. The SGOI region acts as a template for subsequent Si growth such that the Si is strained, and electron and holes in the Si have higher mobility.
摘要翻译： 在本发明的优选实施例中，描述了通过SiGe / SOI热混合工艺将图案化SOI区域转换为图案化SGOI（氧化硅上的硅 - 锗）的方法，以进一步增强嵌入式DRAM中逻辑电路的性能。 SGOI区域用作随后的Si生长的模板，使得Si被应变，并且Si中的电子和空穴具有较高的迁移率。
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公开(公告)号：US06841457B2
公开(公告)日：2005-01-11
申请号：US10196611
申请日：2002-07-16
IPC分类号： H01L29/161 , H01L21/20 , H01L21/265 , H01L21/762 , H01L21/36
CPC分类号： H01L21/76243 , H01L21/02378 , H01L21/02381 , H01L21/02488 , H01L21/02532 , H01L21/02664 , Y10S438/933
摘要： A method of forming a relaxed SiGe-on-insulator substrate having enhanced relaxation, significantly lower defect density and improved surface quality is provided. The method includes forming a SiGe alloy layer on a surface of a first single crystal Si layer. The first single crystal Si layer has an interface with an underlying barrier layer that is resistant to Ge diffusion. Next, ions that are capable of forming defects that allow mechanical decoupling at or near said interface are implanted into the structure and thereafter the structure including the implanted ions is subjected to a heating step which permits interdiffusion of Ge throughout the first single crystal Si layer and the SiGe layer to form a substantially relaxed, single crystal and homogeneous SiGe layer atop the barrier layer. SiGe-on-insulator substrates having the improved properties as well as heterostructures containing the same are also provided.
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公开(公告)号：US06803240B1
公开(公告)日：2004-10-12
申请号：US10654231
申请日：2003-09-03
IPC分类号： H01L21302
CPC分类号： G01N21/9501 , G01N21/9505 , G01N2021/8461
摘要： Described herein is a method for delineating crystalline defects in a thin Si layer over a SiGe alloy layer. The method uses a defect etchant with a high-defect selectivity in Si. The Si is etched downed to a thickness that allows the defect pits to reach the underlying SiGe layer. A second etchant, which can be the same or different from the defect etchant, is then used which attacks the SiGe layer under the pits while leaving Si intact.
摘要翻译： 这里描述了一种在SiGe合金层上描绘薄Si层中的晶体缺陷的方法。 该方法在Si中具有高缺陷选择性的缺陷蚀刻剂。 将Si蚀刻到允许缺陷凹坑到达下面的SiGe层的厚度。 然后使用可以与缺陷蚀刻剂相同或不同的第二蚀刻剂，其在凹陷下攻击SiGe层，同时保持Si完整。
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公开(公告)号：US09123838B2
公开(公告)日：2015-09-01
申请号：US13544439
申请日：2012-07-09
IPC分类号： H01L31/0224 , H01L31/0236 , H01L31/0352
CPC分类号： H01L31/02363 , H01L31/022425 , H01L31/022466 , H01L31/022483 , H01L31/02366 , H01L31/035281 , H01L31/105 , H01L31/1884 , Y02E10/50
摘要： A photovoltaic device includes a substrate layer having a plurality of three-dimensional structures formed therein providing a textured profile. A first electrode is formed over the substrate layer and extends over the three-dimensional structures including non-planar surfaces. The first electrode has a thickness configured to maintain the textured profile, and the first electrode includes a transparent conductive material having a dopant metal activated within the transparent conductive material. A continuous photovoltaic stack is conformally formed over the first electrode, and a second electrode is formed on the photovoltaic stack.
摘要翻译： 光伏器件包括其中形成有多个三维结构的衬底层，其提供纹理轮廓。 第一电极形成在衬底层之上，并且在包括非平面表面的三维结构上延伸。 第一电极具有被配置为保持纹理轮廓的厚度，并且第一电极包括在透明导电材料内激活的掺杂剂金属的透明导电材料。 在第一电极上保形地形成连续的光伏堆叠，并且在光伏堆叠上形成第二电极。
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