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51.发明授权公开(公告)号：US06335863B1
公开(公告)日：2002-01-01
申请号：US09228423
申请日：1999-01-12
IPC分类号： H05K720
CPC分类号： H01L23/49562 , H01L21/4871 , H01L23/142 , H01L23/3732 , H01L2924/0002 , H01L2924/1423 , H01L2924/00
摘要： A low-cost package for semiconductors that is superior in heat dissipation and capable of preventing the cracking of semiconductor elements at the time of mounting, and a semiconductor module employing the package. The package for semiconductors comprises a CVD diamond substrate 22 made of an independent diamond lamina, and a highly heat-conductive metallic member 21 bonded with the substrate. Semiconductor elements such as MMICs are mounted on an area 25 for mounting semiconductor elements. The CVD diamond substrate 22 may be replaced by a composite in which a CVD diamond layer is formed on a base material having thermal conductivity of 100 W/m·K or more. The provision of protuberances 26 of the metallic member 21 around the CVD diamond substrate 22 prevents the leakage of microwaves and millimeter waves.
摘要翻译： 一种半导体的低成本封装，其散热优良并且能够防止在安装时半导体元件的开裂，以及采用该封装的半导体模块。 用于半导体的封装包括由独立的金刚石薄片制成的CVD金刚石基底22和与基底结合的高导热金属部件21。 诸如MMIC的半导体元件安装在用于安装半导体元件的区域25上。 CVD金刚石基板22可以由在其导热率为100W / m·K以上的基材上形成CVD金刚石层的复合体代替。 在CVD金刚石基底22周围设置金属构件21的突起26防止微波和毫米波的泄漏。
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公开(公告)号：US5788766A
公开(公告)日：1998-08-04
申请号：US565595
申请日：1995-11-30
申请人： Yoshiyuki Yamamoto , Keiichiro Tanabe , Katsuko Harano , Takashi Tsuno , Nobuhiro Ota , Naoji Fujimori
发明人： Yoshiyuki Yamamoto , Keiichiro Tanabe , Katsuko Harano , Takashi Tsuno , Nobuhiro Ota , Naoji Fujimori
CPC分类号： H01J35/18 , G21K1/10 , H01L23/473 , H05H7/00 , G21K2201/065 , H01J2235/122 , H01J2235/1262 , H01L2924/0002
摘要： A window material, which has a high thermal conductivity material layer having a thermal conductivity of at least 10 W/cm.multidot.K and which has a cooling medium flow path on or in the high thermal conductivity material layer, has a high heat-dissipating property and a high transmittance.
摘要翻译： 具有导热率至少为10W / cm×KK的高导热性材料层，并且在高导热性材料层上或其上具有冷却介质流路的窗材料具有高的散热性和 透光率高。
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公开(公告)号：US5745362A
公开(公告)日：1998-04-28
申请号：US666089
申请日：1996-06-19
申请人： Kazuo Hiroi , Yoshiyuki Yamamoto
发明人： Kazuo Hiroi , Yoshiyuki Yamamoto
CPC分类号： G05B11/42 , G05B13/024
摘要： In the digital PID (P:proportional, I:integral, D:derivative) control apparatus of the present invention, in which a deviation is obtained from a controlling amount of an object to be controlled, and a target value, a velocity type PI control operation is carried out on the deviation, a velocity type D control operation is carried out on the deviation or the controlling amount, these velocity type control operation outputs are synthesized, and then converted into a position type manipulation signal, and this signal is supplied to the object to be controlled, the derivation processing unit includes the judgment unit for judging whether K=2.multidot..DELTA.t/(.DELTA.t+2.eta..multidot.TD).ltoreq.1, or K>1 by using a control operation period .DELTA.t, a derivative time TD and a derivative gain 1/.eta., and the operation unit which carries out a lagged derivative operation by a bilinear transfer method when K.ltoreq.1, or carries out an exact derivative operation when K>1.
摘要翻译： 在本发明的数字PID（P：比例，I：积分，D：微分）控制装置中，从被控制物的控制量和目标值获得偏差，速度型PI 对偏差进行控制操作，对偏差或控制量执行速度类型D控制操作，合成这些速度型控制操作输出，然后转换为位置型操作信号，并且提供该信号 导出处理单元包括用于通过使用控制操作期间DELTA t来判断K = 2×DELTA t /（DELTA t + 2 eta x TD）= 1或K> 1的判断单元， 衍生时间TD和微分增益1 / eta，以及当K <1时通过双线性传递方法执行滞后导数运算的操作单元，或当K> 1时执行精确导数运算。
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公开(公告)号：US5682063A
公开(公告)日：1997-10-28
申请号：US583542
申请日：1996-01-05
IPC分类号： H01L23/12 , H01L23/14 , H01L23/373 , H01L23/498 , H01L23/053
CPC分类号： H01L23/49894 , H01L23/14 , H01L23/3732 , H01L2924/0002
摘要： The present invention relates to a substrate for a semiconductor device having a diamond base material and a multisublayer wiring layer on the diamond base material, wherein the diamond base material is a diamond layer prepared by vapor phase deposition. The multisublayer wiring layer has at least one insulating sublayer having a relative dielectric constant of not larger than 5 or at least 12 and at least one metal wiring sublayer. The present invention is particularly useful as a substrate for a high performance, high-speed operation semiconductor device.
摘要翻译： 本发明涉及一种在金刚石基材上具有金刚石基材和多层布线层的半导体器件用基板，其中金刚石基材是通过气相沉积制备的金刚石层。 多层布线层具有至少一个具有不大于5或至少12的相对介电常数的绝缘子层和至少一个金属布线子层。 本发明特别适用于高性能，高速运行半导体器件的基板。
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公开(公告)号：US5499601A
公开(公告)日：1996-03-19
申请号：US302879
申请日：1994-09-14
摘要： Diamond particles are dispersed in a metal and the metal matrix is molten and recrystallized so that the diamond particles are aligned to the same crystal orientation to form a substrate equivalent to a diamond single crystal substrate and then the diamond is grown by a vapor phase synthesis on the substrate. The diamond single crystal having the homogeneity and good quality can be formed and the diamond single crystal having a large area can be easily and economically obtained.
摘要翻译： PCT No.PCT / JP94 / 00035 Sec。 371日期：1994年9月14日 102（e）1994年9月14日PCT PCT 1994年1月13日PCT公布。 第WO94 / 16125号PCT公告 日期为1994年7月21日。金刚石颗粒分散在金属中，金属基体熔融并重结晶，使得金刚石颗粒与相同的晶体取向对准以形成与金刚石单晶基板相当的基底，然后金刚石为 通过基底上的气相合成生长。 可以形成具有均匀性和良好质量的金刚石单晶，并且可以容易且经济地获得具有大面积的金刚石单晶。
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公开(公告)号：US5310823A
公开(公告)日：1994-05-10
申请号：US23147
申请日：1993-02-24
摘要： A polyacetal resin composition having a volume resistivity lower than 10.sup.14 [.OMEGA..multidot.cm], which comprises (A) 100 parts by weight of a polyacetal resin and (B) 1 to 100 parts by weight of a polyether ester block copolymer which is derived from (a) a dicarboxylic acid component composed mainly of terephthalic acid, (b) a glycol component composed mainly of 1,4-butanediol and (c) a poly(ethylene oxide)glycol having a number average molecular weight of 500 to 20,000 and has a poly(ethylene oxide) dicarboxylate unit content of 20 to 95% by weight, has excellent antistatic characteristics and mechanical characteristics, and especially a high impact resistance.
摘要翻译： 体积电阻率低于1014 [OMEGA×cm]的聚缩醛树脂组合物，其包含（A）100重量份的聚缩醛树脂和（B）1至100重量份的源自（ a）主要由对苯二甲酸组成的二羧酸组分，（b）主要由1,4-丁二醇组成的二醇组分和（c）数均分子量为500至20,000的聚（环氧乙烷）二醇，并具有 聚（环氧乙烷）二羧酸酯单元含量为20〜95重量％，具有优异的抗静电特性和机械特性，特别是耐冲击性优异。
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57.发明授权Method of manufacturing semiconductor wafer, and composite base and composite substrate for use in that method 有权制造半导体晶片的方法以及用于该方法的复合基板和复合基板公开(公告)号：US08497185B2
公开(公告)日：2013-07-30
申请号：US13107286
申请日：2011-05-13
申请人： Yuki Seki , Issei Satoh , Koji Uematsu , Yoshiyuki Yamamoto
发明人： Yuki Seki , Issei Satoh , Koji Uematsu , Yoshiyuki Yamamoto
IPC分类号： H01L29/02 , H01L21/762 , H01L29/22
CPC分类号： H01L29/0684 , B32B2264/102 , B32B2307/704 , B32B2457/14 , H01L21/76254
摘要： A method of manufacturing a semiconductor wafer of the present invention includes the steps of: obtaining a composite base by forming a base surface flattening layer having a surface RMS roughness of not more than 1.0 nm on a base; obtaining a composite substrate by attaching a semiconductor crystal layer to a side of the composite base where the base surface flattening layer is located; growing at least one semiconductor layer on the semiconductor crystal layer of the composite substrate; and obtaining the semiconductor wafer including the semiconductor crystal layer and the semiconductor layer by removing the base surface flattening layer by wet etching and thereby separating the semiconductor crystal layer from the base. Thus, a method of manufacturing a semiconductor wafer capable of efficiently manufacturing the semiconductor wafer regardless of the type of a base, and a composite base and a composite substrate suitably used in that manufacturing method are provided to efficiently manufacture a semiconductor device.
摘要翻译： 本发明的制造半导体晶片的方法包括以下步骤：通过在基底上形成表面RMS粗糙度不大于1.0nm的基面平坦化层来获得复合基底; 通过将半导体晶体层附着到所述复合基底的所述基面平坦化层所在的一侧来获得复合基板; 在复合衬底的半导体晶体层上生长至少一个半导体层; 以及通过湿法蚀刻去除基底表面平坦化层，从而将半导体晶体层与基底分离，从而获得包括半导体晶体层和半导体层的半导体晶片。 因此，提供一种制造半导体晶片的方法，而不管基底的类型如何，以及适用于该制造方法的复合基底和复合基底都能有效地制造半导体晶片，以有效地制造半导体器件。
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58.发明申请PROTECTIVE-FILM-ATTACHED COMPOSITE SUBSTRATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开保护膜连接的复合基板及制造半导体器件的方法公开(公告)号：US20130168693A1
公开(公告)日：2013-07-04
申请号：US13820599
申请日：2012-02-13
CPC分类号： H01L29/2003 , H01L21/02104 , H01L21/76254
摘要： A protective-film-attached composite substrate includes a support substrate, an oxide film disposed on the support substrate, a semiconductor layer disposed on the oxide film, and a protective film protecting the oxide film by covering a portion that is a part of the oxide film and covered with none of the support substrate and the semiconductor layer. A method of manufacturing a semiconductor device includes the steps of: preparing the protective-film-attached composite substrate; and epitaxially growing, on the semiconductor layer of the protective-film-attached composite substrate, at least one functional semiconductor layer causing an essential function of a semiconductor device to be performed. Thus, there are provided a protective-film-attached composite substrate having a large effective region where a high-quality functional semiconductor layer can be epitaxially grown, and a method of manufacturing a semiconductor device in which the protective-film-attached composite substrate is used.
摘要翻译： 保护膜附着复合基板包括支撑基板，设置在支撑基板上的氧化膜，设置在氧化膜上的半导体层，以及通过覆盖作为氧化物的一部分的部分来保护氧化膜的保护膜 并且不覆盖支撑基板和半导体层。 制造半导体器件的方法包括以下步骤：制备保护膜附着复合衬底; 并且在保护膜附着复合衬底的半导体层上外延生长至少一个引起半导体器件的基本功能的功能半导体层。 因此，提供了可以外延生长高品质功能半导体层的具有大的有效区域的保护膜附着复合基板，以及制造其中保护膜附着复合基板的半导体器件的制造方法 用过的。
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公开(公告)号：US20130032928A1
公开(公告)日：2013-02-07
申请号：US13641582
申请日：2011-11-07
IPC分类号： H01L29/20
CPC分类号： H01L21/76254 , H01L21/0242 , H01L21/02488 , H01L21/0254
摘要： A group III nitride composite substrate includes a support substrate, an oxide film formed on the support substrate, and a group III nitride layer formed on the oxide film. The oxide film may be a film selected from the group consisting of a TiO2 film and a SrTiO3 film, and an impurity may be added to the oxide film. Accordingly, the group III nitride composite substrate having a high bonding strength between the support substrate and the group III nitride layer is provided.
摘要翻译： III族氮化物复合衬底包括支撑衬底，形成在支撑衬底上的氧化物膜和形成在氧化物膜上的III族氮化物层。 氧化物膜可以是选自TiO 2膜和SrTiO 3膜的膜，并且可以向氧化物膜中添加杂质。 因此，提供了在支撑基板和III族氮化物层之间具有高结合强度的III族氮化物复合基板。
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60.发明授权Diamond electron radiation cathode, electron source, electron microscope, and electron beam exposer 失效金刚石电子辐射阴极，电子源，电子显微镜和电子束曝光机公开(公告)号：US07898161B2
公开(公告)日：2011-03-01
申请号：US12095430
申请日：2007-06-27
IPC分类号： H01J1/02
CPC分类号： H01J1/304 , B82Y10/00 , B82Y40/00 , H01J37/073 , H01J37/3174 , H01J2201/30457 , H01J2237/06341 , H01J2237/26
摘要： An object is to provide an electron emitting cathode achieving high luminance, low energy dispersion, and long life. It is therefore an object to provide a diamond electron emitting cathode graspable on a sufficiently stable basis, sharpened at the tip, and improved in electric field intensity. A diamond electron emitting cathode 110 according to the present invention is partitioned into at least three regions, i.e., a front end region 203 intended for electron emission at a tip of columnar shape, a rear end region 201 intended for grasping opposite in the longitudinal direction, and a thinned intermediate region 202, a cross-sectional area of the rear end region is not less than 0.2 mm2, the tip of the front end region is sharpened, and a maximum cross-sectional area of the thinned intermediate region is not more than 0.1 mm2.
摘要翻译： 目的是提供一种实现高亮度，低能量分散和长寿命的电子发射阴极。 因此，本发明的目的是提供一种能够在足够稳定的基础上掌握的金刚石电子发射阴极，其尖端锐化，并提高电场强度。 根据本发明的金刚石电子发射阴极110被划分成至少三个区域，即用于在柱形形状的尖端处用于电子发射的前端区域203，用于在纵向上相对握持的后端区域201 ，以及减薄的中间区域202，后端区域的截面积为0.2mm 2以上，前端区域的前端被削尖，并且变薄的中间区域的最大截面积不大 大于0.1 mm2。
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