公开(公告)号：US4789958A

公开(公告)日：1988-12-06

申请号：US703171

申请日：1985-02-19

申请人： Hideo Maejima ,  Takashi Hotta ,  Ikuro Masuda ,  Masahiro Iwamura ,  Kouzaburou Kurita ,  Masahiro Ueno

发明人： Hideo Maejima ,  Takashi Hotta ,  Ikuro Masuda ,  Masahiro Iwamura ,  Kouzaburou Kurita ,  Masahiro Ueno

IPC分类号： G06F5/01 ,  G06F7/50 ,  G06F7/508 ,  G06F13/40 ,  G06F15/78

CPC分类号： G06F7/508 ,  G06F13/4077 ,  G06F15/7832 ,  G06F5/015 ,  G06F2207/3872 ,  Y02B60/1207 ,  Y02B60/1225 ,  Y02B60/1228 ,  Y02B60/1235

摘要： A carry-look-ahead adder is provided which is implemented as a semiconductor integrated circuit. The integrated circuit includes a bipolar transistor coupled to the output terminal for providing an output indicative of the arithmetic operation. Impedance elements are coupled to the bipolar transistor and at least one FET is provided to control the on/off state of the bipolar transistor.

摘要翻译： 提供了作为半导体集成电路实现的进位前视加法器。 集成电路包括耦合到输出端的双极晶体管，用于提供表示算术运算的输出。 阻抗元件耦合到双极晶体管，并且提供至少一个FET以控制双极晶体管的导通/截止状态。

公开(公告)号：US20110130979A1

公开(公告)日：2011-06-02

申请号：US12674788

申请日：2009-05-18

申请人： Akio Kumagai ,  Takashi Hotta

发明人： Akio Kumagai ,  Takashi Hotta

IPC分类号： G06F19/00

CPC分类号： F02D41/0025 ,  F02B37/00 ,  F02B2075/125 ,  F02D19/0605 ,  F02D19/0636 ,  F02D19/0652 ,  F02D19/0684 ,  F02D19/08 ,  F02D41/062 ,  F02D41/3082 ,  F02D2041/1431 ,  F02D2200/0612 ,  F02D2250/31 ,  F02M26/05 ,  F02M37/0064 ,  F02M63/0007 ,  G01N11/02 ,  G01N11/06 ,  Y02T10/36

摘要： An object of the present invention is to estimate a viscosity of a fuel with high accuracy at all times, irrespective, for example, of fuel properties or conditions of deterioration with time.An internal combustion engine 10 includes a fuel pump 32 for supplying an injection valve with fuel in a tank 24. An ECU 40 detects a transition time t that begins when a drive signal is outputted to the fuel pump 32 and ends when the pump enters a steady operating state. At a start of the fuel pump 32, the higher the viscosity of the fuel, the longer the transition time t tends to be. The ECU 40 therefore detects the viscosity of the fuel based on a deviation Δt between the transition time t and a reference time to. If, for example, a biofuel is used, therefore, the latest viscosity can be accurately detected at all times even with the viscosity of the fuel fluctuating depending on, for example, properties or a condition of deterioration with time of the fuel, and the detection result can be incorporated in, for example, correction of a fuel injection pressure.

摘要翻译： 本发明的目的在于，无论燃料性质还是随着时间的劣化的条件，始终以高精度估计燃料的粘度。 内燃机10包括用于在罐24中向喷射阀供给燃料的燃料泵32.ECU40检测当驱动信号输出到燃料泵32时开始的转变时间t，并且当泵进入时结束 稳定运行状态 在燃料泵32的启动时，燃料的粘度越高，过渡时间t趋于越长。 因此，ECU40基于过渡时间t与参考时间之间的偏差＆Dgr; t来检测燃料的粘度。 因此，例如使用生物燃料的情况下，即使燃料的粘度随燃料的性质或劣化条件而变动，也能始终精确地检测出最新的粘度， 检测结果可以包括在例如燃料喷射压力的校正中。

公开(公告)号：US20070233959A1

公开(公告)日：2007-10-04

申请号：US11802944

申请日：2007-05-29

申请人： Takashi Hotta ,  Toshihiko Kurihara ,  Shigeya Tanaka ,  Hideo Sawamoto ,  Akiyoshi Osumi ,  Koji Saito ,  Kotaro Shimamura

发明人： Takashi Hotta ,  Toshihiko Kurihara ,  Shigeya Tanaka ,  Hideo Sawamoto ,  Akiyoshi Osumi ,  Koji Saito ,  Kotaro Shimamura

IPC分类号： G06F12/00

CPC分类号： G06F12/0897 ,  G06F12/0846 ,  G06F12/0862 ,  G06F12/0864 ,  G06F2212/6028

摘要： A data processor has a first cache memory with a large capacity and one port and a second cache memory with a small capacity and two ports disposed between a main memory and an instruction processing section. Data which is frequently used is stored in the first cache memory and data which is less frequently used is stored in the second cache memory under control of a controller responsive to prefetch instructions. One of the cache memories may be a set associative cache memory composed of a plurality of memory chips each having at least two memory banks and an output part to gain access to data sets consecutively and one at a time within the memory banks. On the basis of an address sent from the instruction processing section, a memory bank is selected, and a data set from the selected memory bank is supplied to the processing section.

公开(公告)号：US07121162B2

公开(公告)日：2006-10-17

申请号：US10898375

申请日：2004-07-26

申请人： Kazuma Hatakeyama ,  Yoshihiro Yoshimura ,  Takashi Hotta

发明人： Kazuma Hatakeyama ,  Yoshihiro Yoshimura ,  Takashi Hotta

IPC分类号： F16H3/08

CPC分类号： F16H3/093 ,  F16H2003/0938 ,  F16H2200/0047 ,  F16H2200/0086 ,  Y10T74/19223 ,  Y10T74/19233 ,  Y10T74/19391 ,  Y10T74/194 ,  Y10T74/19405

摘要： An input shaft 10 is connected rotationally with an intermediary shaft 20 through a connecting drive gear GCV, a connecting first idle gear GC1, a connecting second idle gear GC2 and a connecting driven gear GCN. A fourth speed drive gear G4V, which is formed in a one-piece body with a reverse drive gear GRV, is provided rotatably over the input shaft 10, and a third speed drive gear G3V is provided rotatably over the intermediary shaft 20. Both the third speed drive gear G3V and the fourth speed drive gear G4V mesh with a third and fourth speed driven gear G34N, which is provided rotatably over an output shaft 40. Also, a reverse driven gear GRN, which is connected rotationally with the reverse drive gear GRV through a reverse idle gear GRI, is provided rotatably over the output shaft 40.

摘要翻译： 输入轴10通过连接驱动齿轮GCV，连接第一空转齿轮GC1，连接第二怠速齿轮GC2和连接从动齿轮GCN与中间轴20旋转连接。 形成在具有倒档驱动齿轮GRV的一体式主体中的第四速驱动齿轮G 4 V可旋转地设置在输入轴10上，并且三速驱动齿轮G 3 V可旋转地设置在中间轴 20。 第三速度驱动齿轮G 3 V和第四速度驱动齿轮G 4 V与第三和第四速度从动齿轮G 34 N啮合，第三和第四速度从动齿轮G 34 N可旋转地设置在输出轴40上。 此外，通过反向惰轮GRI与倒档驱动齿轮GRV旋转连接的反向从动齿轮GRN可旋转地设置在输出轴40上。

公开(公告)号：US07082224B2

公开(公告)日：2006-07-25

申请号：US11060400

申请日：2005-02-18

申请人： Mitsuji Ikeda ,  Syoji Yoshida ,  Keisuke Nakashima ,  Koyo Katsura ,  Shigeru Shibukawa ,  Haruo Yoda ,  Takashi Hotta

发明人： Mitsuji Ikeda ,  Syoji Yoshida ,  Keisuke Nakashima ,  Koyo Katsura ,  Shigeru Shibukawa ,  Haruo Yoda ,  Takashi Hotta

IPC分类号： G06K9/64

CPC分类号： G06K9/6203 ,  G06T7/20

摘要： An apparatus for calculating a normalized correlation coefficient used as a similarity evaluation measure by using image data values of pixels in a template image and image data values of pixels in a subimage, included in a search image, corresponding to the template image, has a memory that stores image data values of pixels in the search image and calculating means that calculate a sum of image data values of pixels in the template image and a sum of image data values of pixels in the first rectangular region in the search image or a sum of squares of image data values of pixels in the template image and a sum of squares of image data values of pixels in the first rectangular region in the search image. Normalized correlation coefficient calculating means calculate a normalized correlation coefficient on the basis of the sum of image data values of pixels in the template image and the sum of image data values of pixels in the first rectangular region in the search image, or the sum of squares of image data values of pixels in the template image and the sum of squares of image data values of pixels in the first rectangular region in the search image.

摘要翻译： 一种用于计算通过使用模板图像中的像素的图像数据值和相应于模板图像的包括在搜索图像中的子图像中的像素的图像数据值而用作相似性评估度量的归一化相关系数的装置，具有存储器 其存储搜索图像中的像素的图像数据值;以及计算装置，其计算模板图像中的像素的图像数据值的和和搜索图像中的第一矩形区域中的像素的图像数据值之和，或者 模板图像中的像素的图像数据值的平方和搜索图像中的第一矩形区域中的像素的图像数据值的平方和。 归一化相关系数计算装置基于模板图像中的像素的图像数据值之和和搜索图像中的第一矩形区域中的像素的图像数据值之和或平方和来计算归一化相关系数 的模板图像中的像素的图像数据值和搜索图像中的第一矩形区域中的像素的图像数据值的平方和。

公开(公告)号：US20050102472A1

公开(公告)日：2005-05-12

申请号：US11014885

申请日：2004-12-20

申请人： Takashi Hotta ,  Toshihiko Kurihara ,  Shigeya Tanaka ,  Hideo Sawamoto ,  Akiyoshi Osumi ,  Koji Saito ,  Kotaro Shimamura

发明人： Takashi Hotta ,  Toshihiko Kurihara ,  Shigeya Tanaka ,  Hideo Sawamoto ,  Akiyoshi Osumi ,  Koji Saito ,  Kotaro Shimamura

IPC分类号： G06F12/08 ,  G06F12/00

CPC分类号： G06F12/0897 ,  G06F12/0846 ,  G06F12/0862 ,  G06F12/0864 ,  G06F2212/6028

摘要： A data processor has a first cache memory with a large capacity and one port and a second cache memory with a small capacity and two ports disposed between a main memory and an instruction processing section. Data which is frequently used is stored in the first cache memory and data which is less frequently used is stored in the second cache memory under control of a controller responsive to prefetch instructions. One of the cache memories may be a set associative cache memory composed of a plurality of memory chips each having at least two memory banks and an output part to gain access to data sets consecutively and one at a time within the memory banks. On the basis of an address sent from the instruction processing section, a memory bank is selected, and a data set from the selected memory bank is supplied to the processing section.

公开(公告)号：US20050062749A1

公开(公告)日：2005-03-24

申请号：US10983757

申请日：2004-11-09

申请人： Yasuhiro Nakatsuka ,  Tetsuya Shimomura ,  Manabu Jyou ,  Yuichiro Morita ,  Takashi Hotta ,  Kazushige Yamagishi ,  Yutaka Okada

发明人： Yasuhiro Nakatsuka ,  Tetsuya Shimomura ,  Manabu Jyou ,  Yuichiro Morita ,  Takashi Hotta ,  Kazushige Yamagishi ,  Yutaka Okada

IPC分类号： G06F13/16 ,  G06F3/153 ,  G06F12/00 ,  G06F12/04 ,  G09G5/39 ,  G06F15/167 ,  G06F13/00

CPC分类号： G09G5/39 ,  G09G2360/125

摘要： The basic section of the multimedia data-processing system includes a CPU 1100, an image display unit 2100, a unified memory 1200, a system bus 1920, and devices 1300, 1400, and 1500 connected to the system bus. In this configuration, the CPU is formed on an LSI mounted on a single silicon wafer including instruction processing unit 1110 and display control unit 1140. Main storage area 1210 and display area 1220 are stored within the unified memory. Unified memory port 1910 for connecting the corresponding LSI and the unified memory is provided independently of the system bus intended to connect the LSI and the input/output devices. The unified memory port can be driven faster than system bus.

摘要翻译： 多媒体数据处理系统的基本部分包括CPU 1100，图像显示单元2100，统一存储器1200，系统总线1920和连接到系统总线的设备1300,1400和1500。 在这种配置中，CPU形成在安装在包括指令处理单元1110和显示控制单元1140的单个硅晶片上的LSI上。主存储区域1210和显示区域1220存储在统一存储器内。 与用于连接LSI和输入/输出设备的系统总线无关地提供用于连接对应的LSI和统一存储器的统一存储器端口1910。 统一的存储器端口可以比系统总线更快地驱动。

公开(公告)号：US20050028622A1

公开(公告)日：2005-02-10

申请号：US10898375

申请日：2004-07-26

申请人： Kazuma Hatakeyama ,  Yoshihiro Yoshimura ,  Takashi Hotta

发明人： Kazuma Hatakeyama ,  Yoshihiro Yoshimura ,  Takashi Hotta

IPC分类号： F16H3/093 ,  F16H47/04

CPC分类号： F16H3/093 ,  F16H2003/0938 ,  F16H2200/0047 ,  F16H2200/0086 ,  Y10T74/19223 ,  Y10T74/19233 ,  Y10T74/19391 ,  Y10T74/194 ,  Y10T74/19405

摘要： An input shaft 10 is connected rotationally with an intermediary shaft 20 through a connecting drive gear GCV, a connecting first idle gear GC1, a connecting second idle gear GC2 and a connecting driven gear GCN. A fourth speed drive gear G4V, which is formed in a one-piece body with a reverse drive gear GRV, is provided rotatably over the input shaft 10, and a third speed drive gear G3V is provided rotatably over the intermediary shaft 20. Both the third speed drive gear G3V and the fourth speed drive gear G4V mesh with a third and fourth speed driven gear G34N, which is provided rotatably over an output shaft 40. Also, a reverse driven gear GRN, which is connected rotationally with the reverse drive gear GRV through a reverse idle gear GRI, is provided rotatably over the output shaft 40. Either the third and fourth speed driven gear G34N or the reverse driven gear GRN is connected to the output shaft 40 by a selective clutch CTD.

摘要翻译： 输入轴10通过连接驱动齿轮GCV，连接第一空转齿轮GC1，连接第二怠速齿轮GC2和连接从动齿轮GCN与中间轴20旋转地连接。 形成在具有倒档驱动齿轮GRV的一体式主体中的第四速度驱动齿轮G4V可旋转地设置在输入轴10上，并且第三速度驱动齿轮G3V可旋转地设置在中间轴20上。 第三速度驱动齿轮G3V和第四速度驱动齿轮G4V与可转动地设置在输出轴40上的第三和第四速度从动齿轮G34N啮合。而且，反向从动齿轮GRN，其与倒档驱动齿轮 GRV通过倒档惰轮GRI可旋转地设置在输出轴40上。第三和第四速度从动齿轮G34N或反向从动齿轮GRN都通过选择性离合器CTD连接到输出轴40。

公开(公告)号：US06467004B1

公开(公告)日：2002-10-15

申请号：US09477448

申请日：2000-01-04

申请人： Masahiro Iwamura ,  Shigeya Tanaka ,  Takashi Hotta ,  Tatsumi Yamauchi ,  Kazutaka Mori

发明人： Masahiro Iwamura ,  Shigeya Tanaka ,  Takashi Hotta ,  Tatsumi Yamauchi ,  Kazutaka Mori

IPC分类号： G06F938

CPC分类号： G06F9/3875 ,  G06F9/3869

摘要： A high speed, high performance pipelined semiconductor device is provided, such as a pipelined data processing device and memory device. In the pipeline operation, a functional circuit unit and a transmission unit are separately controlled at each pipeline stage cycle. A transmission unit between two functional circuit units is divided into N transmission units while considering a cycle time, and each divided transmission unit is assigned one pipeline stage cycle.

摘要翻译： 提供了一种高速，高性能流水线半导体器件，例如流水线数据处理设备和存储器件。 在流水线操作中，功能电路单元和传输单元在每个流水线级周期被单独控制。 两个功能电路单元之间的传输单元在考虑周期时间的同时被分成N个传输单元，并且每个划分的传输单元被分配一个流水线级周期。

公开(公告)号：US06256726B1

公开(公告)日：2001-07-03

申请号：US07979772

申请日：1992-11-20

申请人： Takashi Hotta ,  Shigeya Tanaka ,  Hideo Maejima

发明人： Takashi Hotta ,  Shigeya Tanaka ,  Hideo Maejima

IPC分类号： G06F938

CPC分类号： G06F9/3889 ,  G06F9/3802 ,  G06F9/3824 ,  G06F9/3842 ,  G06F9/3851 ,  G06F9/3885

摘要： The data processor for executing, instructions realized by wired logic, by a pipeline system, includes a plurality of instruction registers, and arithmetic operation units of the same number. A plurality of instructions read in the instruction registers in one machine cycle at a time are processed in parallel by the plurality of arithmetic operation units.

摘要翻译： 用于由管线系统执行由有线逻辑实现的指令的数据处理器包括多个指令寄存器和相同数量的算术运算单元。 一次在一个机器周期中在指令寄存器中读取的多个指令由多个算术运算单元并行处理。