公开(公告)号：US08076974B2

公开(公告)日：2011-12-13

申请号：US12980627

申请日：2010-12-29

申请人： Satoshi Tanaka ,  Tomonori Tanoue

发明人： Satoshi Tanaka ,  Tomonori Tanoue

IPC分类号： H03G3/30

CPC分类号： H03F3/19 ,  H03F1/0261 ,  H03F3/245 ,  H03F2200/393 ,  H03F2200/451

摘要： An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.

公开(公告)号：US20060157825A1

公开(公告)日：2006-07-20

申请号：US11376116

申请日：2006-03-16

申请人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

发明人： Yasunari Umemoto ,  Hideyuki Ono ,  Tomonori Tanoue ,  Yasuo Ohsone ,  Isao Ohbu ,  Chushiro Kusano ,  Atsushi Kurokawa ,  Masao Yamane

IPC分类号： H01L27/082

CPC分类号： H01L27/0825 ,  H01L27/0259 ,  H01L29/7371 ,  H01L2224/48091 ,  H01L2224/73265 ,  H03K17/08146 ,  H03K17/615 ,  H01L2924/00014

摘要： The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

摘要翻译： 本发明旨在提高对半导体器件的破坏性。 具有连接在高输出的放大电路的输出（集电极和发射极）之间的达林顿的多个双极晶体管的保护电路与放大电路并联电连接。 放大电路具有彼此并联连接的多个单元HBT（异质结双极晶体管）。 保护电路具有包括具有多个双极型晶体管Q 1至Q 5的第一组保护电路和具有多个双极晶体管的第二组保护电路的两级配置。

公开(公告)号：US07078975B2

公开(公告)日：2006-07-18

申请号：US11247185

申请日：2005-10-12

申请人： Kiichi Yamashita ,  Tomonori Tanoue ,  Shizuo Kondo

发明人： Kiichi Yamashita ,  Tomonori Tanoue ,  Shizuo Kondo

IPC分类号： H03G3/30

CPC分类号： H03F1/02 ,  H03F1/30 ,  H03F3/21 ,  H03G7/001 ,  H03G7/06

摘要： The present invention provides a power amplifier module featuring that: its output power characteristic smoothly changes as the input control voltage changes; and its control sensitivity is stable over a wide dynamic range. By same means, idling current for gain setting is supplied to a single amplifier element or all of multiple stages of amplifier elements of the power amplifier module. By making this idling current behave so as to exponentially change, relative to input control voltage, the invention enables output power control proportional to the input control voltage.

摘要翻译： 本发明提供了一种功率放大器模块，其特征在于：其输出功率特性随着输入控制电压的变化而平滑地变化; 其控制灵敏度在宽动态范围内稳定。 通过同样的方式，用于增益设定的空载电流被提供给功率放大器模块的单个放大器元件或放大器元件的多个级的全部。 通过使该怠速电流相对于输入控制电压发生指数变化，本发明实现与输入控制电压成比例的输出功率控制。

公开(公告)号：US06958656B2

公开(公告)日：2005-10-25

申请号：US10878308

申请日：2004-06-29

申请人： Kiichi Yamashita ,  Tomonori Tanoue ,  Shizuo Kondo

发明人： Kiichi Yamashita ,  Tomonori Tanoue ,  Shizuo Kondo

IPC分类号： H03G3/10 ,  H03G7/00 ,  H04B1/04 ,  H04B7/26 ,  H03G3/30

CPC分类号： H03F1/02 ,  H03F1/30 ,  H03F3/21 ,  H03G7/001 ,  H03G7/06

摘要： The present invention provides a power amplifier module featuring that: its output power characteristic smoothly changes as the input control voltage changes; and its control sensitivity is stable over a wide dynamic range. By same means, idling current for gain setting is supplied to a single amplifier element or all of multiple stages of amplifier elements of the power amplifier module. By making this idling current behave so as to exponentially change, relative to input control voltage, the invention enables output power control proportional to the input control voltage.

摘要翻译： 本发明提供一种功率放大器模块，其特征在于：其输出功率特性随着输入控制电压的变化而平滑地变化; 其控制灵敏度在宽动态范围内稳定。 通过同样的方式，用于增益设定的空载电流被提供给功率放大器模块的单个放大器元件或放大器元件的多个级的全部。 通过使该怠速电流相对于输入控制电压发生指数变化，本发明实现与输入控制电压成比例的输出功率控制。

公开(公告)号：US06771128B1

公开(公告)日：2004-08-03

申请号：US09692182

申请日：2000-10-20

申请人： Kiichi Yamashita ,  Tomonori Tanoue ,  Shizuo Kondo

发明人： Kiichi Yamashita ,  Tomonori Tanoue ,  Shizuo Kondo

IPC分类号： H03G330

CPC分类号： H03F1/02 ,  H03F1/30 ,  H03F3/21 ,  H03G7/001 ,  H03G7/06

摘要： The present invention provides a power amplifier module featuring that: its output power characteristic smoothly changes as the input control voltage changes; and its control sensitivity is stable over a wide dynamic range. By same means, idling current for gain setting is supplied to a single amplifier element or all of multiple stages of amplifier elements of the power amplifier module. By making this idling current behave so as to exponentially change, relative to input control voltage, the invention enables output power control proportional to the input control voltage.

公开(公告)号：US5949097A

公开(公告)日：1999-09-07

申请号：US932939

申请日：1997-09-17

申请人： Koji Hirata ,  Tomonori Tanoue ,  Hiroshi Masuda ,  Hiroyuki Uchiyama ,  Kazuhiro Mochizuki

发明人： Koji Hirata ,  Tomonori Tanoue ,  Hiroshi Masuda ,  Hiroyuki Uchiyama ,  Kazuhiro Mochizuki

IPC分类号： H01L21/331 ,  H01L21/768 ,  H01L27/06 ,  H01L29/737 ,  H01L29/04

CPC分类号： H01L29/66318 ,  H01L27/0605 ,  H01L29/7371

摘要： The present invention relates to a contact structure not only for a semiconductor device having a hetero-junction bipolar transistor or a hetero-insulated gate field effect transistor but also for semiconductor devices at large. In a semiconductor layer of a polycrystalline or amorphous undoped III-V compound semiconductor or an alloy thereof, a through hole is formed for contact. The size of the through hole is set to permit exposure of at least part of a first conductor layer and a dielectric layer, such as an Si compound, present around the first conductor layer, and a second conductor layer is formed within the through hole so as to contact the first conductor layer. Since the semiconductor layer can be subjected to a selective dry etching for the dielectric layer, the dielectric layer is not etched at the time of forming the above through hole in the semiconductor layer. As a result an electric short-circuit of the second conductor layer with a single crystal semiconductor layer which underlies the dielectric layer can be prevented.

摘要翻译： 本发明涉及不仅具有异质结双极晶体管或异质绝缘栅场效应晶体管的半导体器件的接触结构，而且还涉及用于半导体器件的半导体器件。 在多晶或非晶未掺杂的III-V族化合物半导体的半导体层或其合金中，形成用于接触的通孔。 通孔的尺寸被设定为允许暴露在第一导体层周围的第一导体层和诸如Si化合物的电介质层的至少一部分，并且在通孔内形成第二导体层，因此 以接触第一导体层。 由于可以对半导体层进行电介质层的选择性干蚀刻，所以在形成半导体层中的上述通孔时不会蚀刻电介质层。 结果，可以防止具有位于电介质层下面的单晶半导体层的第二导体层的电短路。

公开(公告)号：US5017517A

公开(公告)日：1991-05-21

申请号：US518035

申请日：1990-05-02

申请人： Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chushirou Kusano ,  Hiroshi Masuda ,  Katsuhiko Mitani

发明人： Kazuhiro Mochizuki ,  Tomonori Tanoue ,  Chushirou Kusano ,  Hiroshi Masuda ,  Katsuhiko Mitani

IPC分类号： H01L29/73 ,  H01L21/20 ,  H01L21/28 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737 ,  H01L29/80

CPC分类号： H01L29/66318 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02491 ,  H01L21/02546 ,  H01L21/02639 ,  H01L21/28 ,  Y10S148/005 ,  Y10S148/011 ,  Y10S148/026 ,  Y10S438/976

摘要： A method for fabricating a semiconductor device comprises the steps of forming the first semiconductor layer on a semiconductor substrate, forming a surface protection layer of antimony (Sb) or the material having Sb as its main component, executing the other steps necessary for the fabrication of the semiconductor device, removing the surface protection layer, and forming, on the first semiconductor layer thus exposed, the second semiconductor layer.

摘要翻译： 一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成第一半导体层，形成锑（Sb）的表面保护层或具有Sb的材料作为其主要成分，执行制造所需的其它步骤 半导体器件，去除表面保护层，并且在由此暴露的第一半导体层上形成第二半导体层。

公开(公告)号：US08546939B2

公开(公告)日：2013-10-01

申请号：US11618207

申请日：2006-12-29

申请人： Kenji Sasaki ,  Tomonori Tanoue ,  Sakae Kikuchi ,  Toshifumi Makino ,  Takeshi Sato ,  Tsutomu Kobori ,  Yasunari Umemoto ,  Takashi Kitahara

发明人： Kenji Sasaki ,  Tomonori Tanoue ,  Sakae Kikuchi ,  Toshifumi Makino ,  Takeshi Sato ,  Tsutomu Kobori ,  Yasunari Umemoto ,  Takashi Kitahara

IPC分类号： H01L23/34 ,  H01L29/66 ,  H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H03F1/00 ,  H03F3/14 ,  H03F3/04 ,  H03F3/68 ,  H04B1/06 ,  H04B7/00 ,  H04B1/28

CPC分类号： H04B1/28 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L25/18 ,  H01L2223/6644 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： A technology is provided so that RF modules used for cellular phones etc. can be reduced in size. Over a wiring board constituting an RF module, there are provided a first semiconductor chip in which an amplifier circuit is formed and a second semiconductor chip in which a control circuit for controlling the amplifier circuit is formed. A bonding pad over the second semiconductor chip is connected with a bonding pad over the first semiconductor chip directly by a wire without using a relay pad. In this regard, the bonding pad formed over the first semiconductor chip is not square but rectangular (oblong).

摘要翻译： 提供了一种技术，使得用于蜂窝电话等的RF模块的尺寸可以减小。 在构成RF模块的布线板上，设置有形成放大器电路的第一半导体芯片和形成用于控制放大器电路的控制电路的第二半导体芯片。 第二半导体芯片上的接合焊盘通过导线直接通过第一半导体芯片上的接合焊盘连接而不使用继电器垫。 在这方面，形成在第一半导体芯片上的焊盘不是正方形，而是矩形（长方形）。

公开(公告)号：US20100230789A1

公开(公告)日：2010-09-16

申请号：US12724268

申请日：2010-03-15

申请人： Chiko Yorita ,  Yuji Shirai ,  Hirokazu Nakajima ,  Hiroshi Ozaku ,  Tomonori Tanoue ,  Hiroshi Okabe ,  Tsutomu Hara

发明人： Chiko Yorita ,  Yuji Shirai ,  Hirokazu Nakajima ,  Hiroshi Ozaku ,  Tomonori Tanoue ,  Hiroshi Okabe ,  Tsutomu Hara

IPC分类号： H01L23/552 ,  H01L21/78 ,  H01L21/56

CPC分类号： H01L23/66 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2223/6644 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/0052 ,  H05K3/284 ,  H05K9/0084 ,  H05K2201/09036 ,  H05K2201/0909 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A technology is provided which allows a reduction in the size of a semiconductor device without degrading an electromagnetic shielding effect and reliability against reflow heating. After a plurality of components are mounted over a component mounting surface of a module substrate, a resin is formed so as to cover the mounted components. Further, over surfaces (upper and side surfaces) of the resin, a shield layer including a laminated film of a Cu plating film and an Ni plating film is formed. In the shield layer, a plurality of microchannel cracks are formed randomly along grain boundaries and in a net-like configuration without being coupled to each other in a straight line, and form a plurality of paths extending from the resin to a surface of the shield layer by the microchannel cracks.

摘要翻译： 提供了一种技术，其允许减小半导体器件的尺寸而不降低电磁屏蔽效应和不受回流加热的可靠性。 在将多个部件安装在模块基板的部件安装表面上之后，形成树脂以覆盖安装的部件。 此外，树脂的表面（上表面和侧表面）上形成包括Cu镀膜和Ni镀膜的层叠膜的屏蔽层。 在屏蔽层中，沿着晶界和网状构造随机地形成多个微通道裂纹，而不以直线彼此连接，并且形成从树脂延伸到屏蔽层表面的多个路径 层由微通道裂缝。

公开(公告)号：US07067857B2

公开(公告)日：2006-06-27

申请号：US10788277

申请日：2004-03-01

申请人： Kazuhiro Mochizuki ,  Isao Ohbu ,  Tomonori Tanoue ,  Chisaki Takubo ,  Kenichi Tanaka

发明人： Kazuhiro Mochizuki ,  Isao Ohbu ,  Tomonori Tanoue ,  Chisaki Takubo ,  Kenichi Tanaka

IPC分类号： H01L29/739 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L27/0823 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/7371 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/16152 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2224/05599

摘要： The gist of the present invention is as follows: In a monolithic microwave integrate circuit (MMIC) using a heterojunction bipolar transistor (HBT), via holes are respectively formed from the bottom of the MMIC for the emitter, base and collector. Of the via holes, one is located so as to face the HBT. The respective topside electrodes for the other via holes located so as not to face the HBT are provided in contact with the MMIC substrate.

摘要翻译： 本发明的要点如下：在使用异质结双极晶体管（HBT）的单片微波积分电路（MMIC）中，从MMIC的底部分别形成用于发射极，基极和集电极的通孔。 通孔中的一个位于与HBT相对的位置。 用于不与HBT相对的另一个通孔的相应顶侧电极设置成与MMIC衬底接触。