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公开(公告)号:US4583123A
公开(公告)日:1986-04-15
申请号:US704360
申请日:1985-02-22
CPC分类号: H04N5/23212 , G02B7/36
摘要: In this circuit, video signals with a continuously increasing or decreasing amplitude are applied to the signal input of a threshold difference comparator at whose reference inputs selectively determined high and low threshold signals are applied. The output of the threshold difference comparator is applied at the first input of a threshold AND gate having a second input connected to a clock. The output of the threshold AND gate supplies a clock pulse sequence which has a duration corresponding with the time during which the input video signal has an amplitude which continuously increases or decreases from one of the threshold reference amplitudes to the other. The clock pulse sequences contained in successive measuring intervals have their respective pulses counted by a counter, and are stored in a buffer. A measurement series is performed corresponding to different focus settings, optimum focus adjustment being achieved when a minimum count of clock pulses in a clock pulse sequence is obtained.
摘要翻译: 在该电路中,具有连续增加或减小的幅度的视频信号被施加到阈值差分比较器的信号输入端,其中参考输入选择性地确定施加了高和低阈值信号。 阈值差分比较器的输出被施加在具有连接到时钟的第二输入的阈值AND门的第一输入端。 阈值与门的输出提供时钟脉冲序列,其具有与输入视频信号具有从阈值参考幅度之一连续增加或减小的幅度的时间相对应的持续时间。 连续测量间隔中包含的时钟脉冲序列具有由计数器计数的各自脉冲,并存储在缓冲器中。 对应于不同的焦点设置执行测量系列,当获得时钟脉冲序列中的时钟脉冲的最小计数时,实现最佳聚焦调整。