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185 条记录 (耗时 0.036 秒)

    Thin film transistor panel
    54.
    发明申请
    Thin film transistor panel 有权
    薄膜晶体管面板

    公开(公告)号：US20060158576A1

    公开(公告)日：2006-07-20

    申请号：US11332279

    申请日：2006-01-13

    申请人： Hyun-Wuk Kim ,  Jae-Jin Lyu ,  Yoon-Sung Um ,  Chang-Hun Lee ,  Mee-Hye Jung ,  Kyoung-Ju Shin

    发明人： Hyun-Wuk Kim ,  Jae-Jin Lyu ,  Yoon-Sung Um ,  Chang-Hun Lee ,  Mee-Hye Jung ,  Kyoung-Ju Shin

    IPC分类号： G02F1/1343

    CPC分类号： G02F1/133707 ,  G02F1/133753 ,  G02F1/134309 ,  G02F1/1393

    摘要： A thin film transistor panel is provided. The thin film transistor panel includes: a substrate; gate lines formed on the substrate; data lines insulated from the gate lines and intersecting the gate lines; thin film transistors which are connected to the gate lines and the data lines and have drain electrodes; capacitive coupling electrodes connected to the drain electrodes; and pixel electrodes which are formed in the pixels surrounded by the gate lines and the data lines and include first pixel electrodes connected to the drain electrodes and second pixel electrodes which are separated from the first pixel electrodes and overlap with the capacitive coupling electrodes, wherein the first and second pixel electrodes of different pixel electrodes have a left-right symmetrical structure.

    摘要翻译： 提供薄膜晶体管面板。 薄膜晶体管面板包括：基板; 形成在基板上的栅极线; 与栅极线绝缘并与栅极线相交的数据线; 连接到栅极线和数据线并具有漏电极的薄膜晶体管; 连接到漏电极的电容耦合电极; 以及形成在由栅极线和数据线包围的像素中的像素电极，并且包括连接到与第一像素电极分离并与电容耦合电极重叠的漏电极和第二像素电极的第一像素电极，其中， 不同像素电极的第一和第二像素电极具有左右对称结构。

    Liquid crystal display
    55.
    发明申请
    Liquid crystal display 审中-公开
    液晶显示器

    公开(公告)号：US20060092116A1

    公开(公告)日：2006-05-04

    申请号：US11259788

    申请日：2005-10-27

    申请人： Yoon-Sung Um ,  Jae-Jin Lyu ,  Woo-Shik Lee ,  Tae-Seok Jang ,  Jeong-Seon Kim ,  Valery Krasnoslobodtsev

    发明人： Yoon-Sung Um ,  Jae-Jin Lyu ,  Woo-Shik Lee ,  Tae-Seok Jang ,  Jeong-Seon Kim ,  Valery Krasnoslobodtsev

    IPC分类号： G09G3/36

    CPC分类号： G02F1/133707 ,  G02F1/134336 ,  G02F1/134363

    摘要： A liquid crystal display is provided, which includes: a first signal line; a second signal line intersecting the first signal line; a thin film transistor connected to the first and the second signal lines; a first field generating electrode and a second field generating electrode facing each other; and a liquid crystal layer disposed between the first electrode and the second electrode, wherein one of the first and the second field generating electrodes is connected to the thin film transistor, and the first field generating electrode includes a plurality of first branch electrodes extending obliquely to the first and the second signal lines.

    摘要翻译： 提供一种液晶显示器，其包括：第一信号线; 与第一信号线相交的第二信号线; 连接到第一和第二信号线的薄膜晶体管; 第一场产生电极和第二场产生电极彼此面对; 以及设置在第一电极和第二电极之间的液晶层，其中第一和第二场产生电极中的一个连接到薄膜晶体管，并且第一场产生电极包括多个第一分支电极，其倾斜延伸到 第一和第二信号线。

    Liquid crystal display and thin film transistor array panel therefor
    57.
    发明申请
    Liquid crystal display and thin film transistor array panel therefor 有权

    公开(公告)号：US20060072048A1

    公开(公告)日：2006-04-06

    申请号：US11288246

    申请日：2005-11-29

    申请人： Jung-Hee Lee ,  Yoon-Sung Um ,  Jong-Ho Son ,  Jae-Jin Lyu

    发明人： Jung-Hee Lee ,  Yoon-Sung Um ,  Jong-Ho Son ,  Jae-Jin Lyu

    IPC分类号： G02F1/1343

    CPC分类号： G02F1/1368 ,  G02F1/13624 ,  G02F2001/134345 ,  H01L27/1255

    摘要： A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate and including a gate electrode; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer opposite the gate electrode; a data line formed on the gate insulating layer and including a first source electrode located on the semiconductor layer; first and second drain electrodes formed on the semiconductor layer, separated from each other and overlapping the gate electrode; a passivation layer formed on the data line and the first and the second drain electrodes; and first and second pixel electrodes electrically connected to the first and the second drain electrodes, respectively, wherein an overlapping area between the gate electrode and the first drain electrode is different from an overlapping area between the gate electrode and the second drain electrode.

    Thin film transistor array panel with capacitive coupling between adjacent pixel areas
    59.
    发明授权
    Thin film transistor array panel with capacitive coupling between adjacent pixel areas 有权
    薄膜晶体管阵列面板，在相邻像素区域之间具有电容耦合

    公开(公告)号：US07973899B2

    公开(公告)日：2011-07-05

    申请号：US12544871

    申请日：2009-08-20

    申请人： Hyun-Wuk Kim ,  Jae-Jin Lyu ,  Yoon-Sung Um ,  Chang-Hun Lee

    发明人： Hyun-Wuk Kim ,  Jae-Jin Lyu ,  Yoon-Sung Um ,  Chang-Hun Lee

    IPC分类号： G02F1/1343 ,  G02F1/1337

    CPC分类号： G02F1/134309 ,  G02F1/136286 ,  G02F2001/134345

    摘要： A thin film transistor array panel according to one embodiment of the invention comprises: first, second, and third pixel electrodes arranged sequentially, the second pixel electrode including first and second sub-pixel electrodes, the second pixel electrode occupying an area comprising a first area and a second area that is disposed closer to the third pixel electrode than the first area; first, second, and third thin film transistors connected to the first, the second, and the third pixel electrodes, respectively; first, second, and third gate lines connected to the first, the second, and the third thin film transistors, respectively; and a data line connected to the first, the second, and the third thin film transistors, wherein the second sub-pixel electrode is capacitively coupled to the third pixel electrode, and the second sub-pixel electrode is present in both the first and the second areas.

    摘要翻译： 根据本发明的一个实施例的薄膜晶体管阵列面板包括：顺序布置的第一，第二和第三像素电极，第二像素电极包括第一和第二子像素电极，第二像素电极占据包括第一区域 以及比所述第一区域更靠近所述第三像素电极设置的第二区域; 分别连接到第一，第二和第三像素电极的第一，第二和第三薄膜晶体管; 分别连接到第一，第二和第三薄膜晶体管的第一，第二和第三栅极线; 以及连接到第一，第二和第三薄膜晶体管的数据线，其中第二子像素电极电容耦合到第三像素电极，并且第二子像素电极存在于第一和第三薄膜晶体管的第一和第三薄膜晶体管中， 第二区。

    THIN FILM TRANSISTOR ARRAY PANEL
    60.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL 有权
    薄膜晶体管阵列

    公开(公告)号：US20090310074A1

    公开(公告)日：2009-12-17

    申请号：US12544871

    申请日：2009-08-20

    申请人： Hyun-Wuk Kim ,  Jae-Jin Lyu ,  Yoon-Sung Um ,  Chang-Hun Lee

    发明人： Hyun-Wuk Kim ,  Jae-Jin Lyu ,  Yoon-Sung Um ,  Chang-Hun Lee

    IPC分类号： G02F1/1343

    CPC分类号： G02F1/134309 ,  G02F1/136286 ,  G02F2001/134345

    摘要： A thin film transistor array panel according to one embodiment of the invention comprises: first, second, and third pixel electrodes arranged sequentially, the second pixel electrode including first and second sub-pixel electrodes, the second pixel electrode occupying an area comprising a first area and a second area that is disposed closer to the third pixel electrode than the first area; first, second, and third thin film transistors connected to the first, the second, and the third pixel electrodes, respectively; first, second, and third gate lines connected to the first, the second, and the third thin film transistors, respectively; and a data line connected to the first, the second, and the third thin film transistors, wherein the second sub-pixel electrode is capacitively coupled to the third pixel electrode, and the second sub-pixel electrode is present in both the first and the second areas.

    摘要翻译： 根据本发明的一个实施例的薄膜晶体管阵列面板包括：顺序布置的第一，第二和第三像素电极，第二像素电极包括第一和第二子像素电极，第二像素电极占据包括第一区域 以及比所述第一区域更靠近所述第三像素电极设置的第二区域; 分别连接到第一，第二和第三像素电极的第一，第二和第三薄膜晶体管; 分别连接到第一，第二和第三薄膜晶体管的第一，第二和第三栅极线; 以及连接到第一，第二和第三薄膜晶体管的数据线，其中第二子像素电极电容耦合到第三像素电极，并且第二子像素电极存在于第一和第三薄膜晶体管的第一和第三薄膜晶体管中， 第二区。