利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

103 条记录 (耗时 0.024 秒)

    Turbo-like forward error correction encoder and decoder with improved weight spectrum and reduced degradation in the waterfall performance region
    51.
    发明授权
    Turbo-like forward error correction encoder and decoder with improved weight spectrum and reduced degradation in the waterfall performance region 有权
    Turbo式前向误差校正编码器和解码器，具有改进的重量谱和降低瀑布性能区域的降级

    公开(公告)号：US06675348B1

    公开(公告)日：2004-01-06

    申请号：US09636789

    申请日：2000-08-11

    申请人： A. Roger Hammons, Jr. ,  Hehsam El Gamal

    发明人： A. Roger Hammons, Jr. ,  Hehsam El Gamal

    IPC分类号： H03M1303

    CPC分类号： H03M13/296 ,  H03M13/2945 ,  H03M13/2978

    摘要： An encoder, decoder, method of encoding, and method of decoding which preserves the turbo coder performance in the waterfall region, while improving upon performance in the error asymptote region, by applying a parser or other similar element to the input bit stream. The parser assigns input bits to a subset of constituent encoders in a pseudo-random fashion. The parsing strategy breaks up input sequences producing low Hamming weight error events, thereby improving the weight spectrum and asymptotic performance of the code, while not impacting waterfall region performance. The parser or other similar element may also strengthen the weight spectrum without adversely affecting convergence of a corresponding decoder.

    摘要翻译： 编码器，解码器，编码方法和解码方法，通过将解析器或其它类似元件应用于输入比特流，同时改善了误差渐近区域中的性能，从而保持了瀑布区域中的turbo编码器性能。 解析器以伪随机方式将输入位分配给组成编码器的子集。 解析策略打破了产生低汉明重量误差事件的输入序列，从而提高了码的重量谱和渐近性能，同时不影响瀑布区的性能。 解析器或其他类似元素还可以加强权重谱，而不会不利地影响对应解码器的收敛。

    Information recording and reproduction apparatus, optical disk apparatus and data reproduction method
    52.
    发明申请
    Information recording and reproduction apparatus, optical disk apparatus and data reproduction method 失效
    信息记录和再现装置，光盘装置和数据再现方法

    公开(公告)号：US20030227851A1

    公开(公告)日：2003-12-11

    申请号：US10340752

    申请日：2003-01-13

    申请人： FUJITSU LIMITED

    发明人： Satoshi Furuta ,  Katsuhiko Fukuda ,  Akihiro Itakura

    IPC分类号： G11B007/005

    CPC分类号： H03M13/3905 ,  G11B20/1833 ,  H03M13/2978 ,  H03M13/6561

    摘要： An information recording and reproduction apparatus has a turbo decoder that decodes turbo encoded data. The turbo decoder has a number of likelihood ratio calculation units, forward direction path probability calculation units the number of which is less than the number of the likelihood ratio calculation units, and backward direction path probability calculation units the number of which is less than the number of the likelihood ratio calculation units. The likelihood ratio calculation units calculate in parallel the likelihood ratio for each of a plurality of data blocks. The forward direction path probability calculation units time-divisionally calculate probabilities of the forward direction paths for the data blocks. The backward direction path probability calculation units time-divisionally calculate probabilities of the backward direction paths for the data blocks.

    摘要翻译： 信息记录和再现装置具有解码turbo编码数据的turbo解码器。 涡轮解码器具有多个似然比计算单元，其数目小于似然比计算单元的数量的前向路径概率计算单元，其数量小于该数目的后向路径概率计算单元 的似然比计算单位。 似然比计算单元并行地计算多个数据块中的每一个的似然比。 向前方向路径概率计算单元分时地计算数据块的前向路径的概率。 向后方向路径概率计算单元分时地计算数据块的反向路径的概率。

    Parallel concatenated code with soft-in soft-out interactive turbo decoder
    54.
    发明申请
    Parallel concatenated code with soft-in soft-out interactive turbo decoder 有权
    并行级联代码与软入软交互式turbo解码器

    公开(公告)号：US20020061071A1

    公开(公告)日：2002-05-23

    申请号：US09878148

    申请日：2001-06-08

    发明人： Kelly B. Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran ,  Christopher R. Jones ,  Thomas Ashford Hughes JR.

    IPC分类号： H04L027/20 ,  H04L027/12 ,  H04L027/04

    CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

    摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Soloman encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

    摘要翻译： 一种并行级联（Turbo）编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列，或者对应于已经编码的数据序列，例如由Reed-Soloman编码器提供的。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法（例如块或随机交织）的加法规则进行交织，其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数），因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的，那么输出元组可以从编码器顺序选择，也不会丢失元组。 如果输入元组包含多个比特，那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器，或者所有编码器可以具有交织器，无论输入元组位是否独立交错。 模式类型交织也允许并行解码。

    Hybrid concatenated codes and iterative decoding
    55.
    发明授权
    Hybrid concatenated codes and iterative decoding 失效
    混合级联代码和迭代解码

    公开(公告)号：US06023783A

    公开(公告)日：2000-02-08

    申请号：US857021

    申请日：1997-05-15

    申请人： Dariush Divsalar ,  Fabrizio Pollara

    发明人： Dariush Divsalar ,  Fabrizio Pollara

    IPC分类号： H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  H04L1/00 ,  H03M13/12 ,  H03M13/22 ,  H04L25/49

    CPC分类号： H04L1/005 ,  H03M13/256 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2746 ,  H03M13/2903 ,  H03M13/296 ,  H03M13/2972 ,  H03M13/2978 ,  H03M13/3988 ,  H04L1/0041 ,  H04L1/0066 ,  H04L1/0071 ,  H04L1/0054

    摘要： Several improved turbo code apparatuses and methods. The invention encompasses several classes: (1) A data source is applied to two or more encoders with an interleaver between the source and each of the second and subsequent encoders. Each encoder outputs a code element which may be transmitted or stored. A parallel decoder provides the ability to decode the code elements to derive the original source information d without use of a received data signal corresponding to d. The output may be coupled to a multilevel trellis-coded modulator (TCM). (2) A data source d is applied to two or more encoders with an interleaver between the source and each of the second and subsequent encoders. Each of the encoders outputs a code element. In addition, the original data source d is output from the encoder. All of the output elements are coupled to a TCM. (3) At least two data sources are applied to two or more encoders with an interleaver between each source and each of the second and subsequent encoders. The output may be coupled to a TCM. (4) At least two data sources are applied to two or more encoders with at least two interleavers between each source and each of the second and subsequent encoders. (5) At least one data source is applied to one or more serially linked encoders through at least one interleaver. The output may be coupled to a TCM. The invention includes a novel way of terminating a turbo coder.

    摘要翻译： 几种改进的turbo码设备和方法。 本发明涵盖几个类别：（1）数据源被应用于具有交织器的两个或多个编码器，源与每个第二和后续编码器之间。 每个编码器输出可以被发送或存储的代码元素。 并行解码器提供对代码元素进行解码以导出原始源信息d的能力，而不使用对应于d的接收数据信号。 输出可以耦合到多电平网格编码调制器（TCM）。 （2）将数据源d应用于两个或更多个编码器，该编码器在源与第二和后续编码器之间具有交织器。 每个编码器输出一个代码元素。 另外，从编码器输出原始数据源d。 所有输出元件都耦合到TCM。 （3）至少两个数据源被应用于两个或更多个编码器，其中每个源与第二个和后续编码器中的每一个之间具有交织器。 输出可以耦合到TCM。 （4）至少两个数据源被应用于具有至少两个交织器的两个或多个编码器，每个源和第二个和后续的编码器之间的每一个。 （5）至少一个数据源通过至少一个交织器应用于一个或多个串行编码器。 输出可以耦合到TCM。 本发明包括终止turbo编码器的新颖方式。

    Turbo decoder with a low-power input format and associated method
    56.
    发明授权
    Turbo decoder with a low-power input format and associated method 有权
    Turbo解码器具有低功耗输入格式及相关方法

    公开(公告)号：US09473177B2

    公开(公告)日：2016-10-18

    申请号：US14555309

    申请日：2014-11-26

    申请人： Freescale Semiconductor, Inc.

    发明人： Robert Bahary ,  Eric J Jackowski

    IPC分类号： H03M13/29 ,  G06F11/10 ,  H03M13/00

    CPC分类号： H03M13/2957 ,  G06F11/1076 ,  H03M13/2978 ,  H03M13/6505 ,  H03M13/6561 ,  H03M13/6563 ,  H03M13/6566

    摘要： A turbo decoder stores received data in words in systematic memory and parity memory in a way that is known that it will be used for later iterations by turbo decoder engines arranged to operate in parallel. A loader receives and separates LLRs into systematic and parity data and stores them into a portion of a word per cycle until a word is full in a corresponding one of the systematic memory and parity memory. The turbo decoder engines read the LLRs from one word of the systematic memory and one word of the parity memory in a single cycle. The data can be rearranged within the words in an order format for the turbo decoder engines to later read them by providing sub-words corresponding to respective ones of the plurality of turbo decoder engines.

    摘要翻译： turbo解码器以已知的方式存储系统存储器和奇偶校验存储器中的接收数据，该方法将被用于被并行操作的Turbo解码器引擎的后续迭代。 加载器将LLR接收并分离为系统和奇偶校验数据，并将它们存储到每个周期的单词的一部分中，直到在系统存储器和奇偶校验存储器中相应的一个字中的字满。 turbo解码器引擎在单个周期中从系统存储器的一个字和奇偶校验存储器的一个字读取LLR。 数据可以按照订单格式在单词内重新排列，以便turbo解码器引擎稍后通过提供与多个turbo解码器引擎中的相应的turbo解码器引擎相对应的子字来读取它们。

    CODING ARCHITECTURE FOR MULTI-LEVEL NAND FLASH MEMORY WITH STUCK CELLS
    58.
    发明申请
    CODING ARCHITECTURE FOR MULTI-LEVEL NAND FLASH MEMORY WITH STUCK CELLS 审中-公开
    带有电池的多级NAND闪存存储器的编码架构

    公开(公告)号：US20140281791A1

    公开(公告)日：2014-09-18

    申请号：US14213446

    申请日：2014-03-14

    申请人： SK hynix memory solutions inc.

    发明人： Marcus Marrow

    IPC分类号： H03M13/29 ,  H03M13/11

    CPC分类号： G06F11/1072 ,  G06F11/1008 ,  H03M13/1102 ,  H03M13/1105 ,  H03M13/1515 ,  H03M13/251 ,  H03M13/29 ,  H03M13/2906 ,  H03M13/2927 ,  H03M13/2978 ,  H03M13/356

    摘要： Encoded least significant bit (LSB) values are generated for a cell based at least in part on a readback value for the cell. The encoded LSB values is decoded in order to obtain one or more decoded LSB values. Encoded most significant bit (MSB) values are generated for the cell based at least in part on (1) the readback value for the cell and (2) the decoded LSB values. The encoded MSB values are decoded in order to obtain one or more decoded MSB values, wherein the bit positions of the decoded LSB values do not overlap with the bit positions of the decoded MSB values.

    摘要翻译： 至少部分地基于小区的回读值为小区生成编码的最低有效位（LSB）值。 编码的LSB值被解码以便获得一个或多个解码的LSB值。 至少部分地基于（1）小区的回读值和（2）解码的LSB值，为小区生成编码的最高有效位（MSB）值。 对编码的MSB值进行解码以获得一个或多个解码的MSB值，其中解码的LSB值的位位置与解码的MSB值的位位置不重叠。

    N-way parallel turbo decoder architecture
    59.
    发明授权
    N-way parallel turbo decoder architecture 有权
    N路并行turbo解码器架构

    公开(公告)号：US08438434B2

    公开(公告)日：2013-05-07

    申请号：US12650072

    申请日：2009-12-30

    申请人： Nur Engin

    发明人： Nur Engin

    IPC分类号： G06F11/00

    CPC分类号： H03M13/2987 ,  G11C7/1042 ,  G11C8/10 ,  G11C8/12 ,  H03M13/2978 ,  H03M13/6566

    摘要： Various embodiments relate to a memory device in a turbo decoder and a related method for allocating data into the memory device. Different communications standards use data blocks of varying sizes when enacting block decoding of concatenated convolutional codes. The memory device efficiently minimizes space while enabling a higher throughput of the turbo decoder by enabling a plurality of memory banks of equal size. The number of memory banks may be limited by the amount of unused space in the memory banks, which may be a waste of area on an IC chip. Using the address associated with the maximum value of the data block, the memory may be split into a plurality of memory blocks according to the most-significant bits of the maximum address, with a number of parallel SISO decoders matching the number of memory banks. This may enable higher throughput while minimizing area on the IC chip.

    摘要翻译： 各种实施例涉及turbo解码器中的存储器件以及用于将数据分配到存储器件中的相关方法。 不同的通信标准在采用级联卷积码的块解码时，使用不同大小的数据块。 存储器件有效地使空间最小化，同时通过启用相同大小的多个存储体，能够实现turbo解码器的更高吞吐量。 存储体的数量可能受到存储体中未使用空间的量的​​限制，这可能是IC芯片上的区域的浪费。 使用与数据块的最大值相关联的地址，存储器可以根据最大地址的最高有效位被分割成多个存储器块，并且多个并行SISO解码器与存储器组的数量相匹配。 这可以实现更高的吞吐量，同时最小化IC芯片上的面积。