公开(公告)号：US20090041952A1

公开(公告)日：2009-02-12

申请号：US12178300

申请日：2008-07-23

申请人： Tae Ho Yoon ,  Hyung Sang Park ,  Yong Min Yoo

发明人： Tae Ho Yoon ,  Hyung Sang Park ,  Yong Min Yoo

IPC分类号： H05H1/24

CPC分类号： C23C16/402 ,  C23C16/45542

摘要： Methods of depositing a silicon oxide film are disclosed. One embodiment is a plasma enhanced atomic layer deposition (PEALD) process that includes supplying a vapor phase silicon precursor, such as a diaminosilane compound, to a substrate, and supplying oxygen plasma to the substrate. Another embodiment is a pulsed hybrid method between atomic layer deposition (ALD) and chemical vapor deposition (CVD). In the other embodiment, a vapor phase silicon precursor, such as a diaminosilane compound, is supplied to a substrate while ozone gas is continuously or discontinuously supplied to the substrate.

摘要翻译： 公开了沉积氧化硅膜的方法。 一个实施例是等离子体增强原子层沉积（PEALD）工艺，其包括将诸如二氨基硅烷化合物的气相硅前体供应到基底，并将氧等离子体供应到基底。 另一个实施例是在原子层沉积（ALD）和化学气相沉积（CVD）之间的脉冲混合方法。 在另一个实施方案中，将诸如二氨基硅烷化合物的气相硅前体供给到基板，同时将臭氧气体连续地或不连续地供应到基板。

公开(公告)号：US20080299212A1

公开(公告)日：2008-12-04

申请号：US11816999

申请日：2006-02-24

申请人： Eung Kweon Kim ,  Nae-Choon Yoo ,  Won-Min Yoo

发明人： Eung Kweon Kim ,  Nae-Choon Yoo ,  Won-Min Yoo

IPC分类号： A61K35/16

CPC分类号： A61K35/16

摘要： The present invention relates to a pharmaceutical agent for treating Avellino corneal dystrophy, and more particularly, to a pharmaceutical composition for treating Avellino corneal dystrophy comprising pharmaceutically effective amount of blood plasma or serum as an active ingredient. The pharmaceutical composition of the present invention has an effect of improving symptoms by dissolving away hyaline granules in the cornea of a patient with severe Avellino corneal dystrophy due to LASIK surgery.

摘要翻译： 本发明涉及一种用于治疗阿维拉氏角膜营养不良的药剂，更具体地，涉及包含药学有效量的血浆或血清作为活性成分的用于治疗阿维拉氏角膜营养不良的药物组合物。 本发明的药物组合物通过将透明颗粒溶解在由于LASIK手术引起的严重的Avellino角膜营养不良患者的角膜中而改善症状的效果。

公开(公告)号：US20060252199A1

公开(公告)日：2006-11-09

申请号：US11458224

申请日：2006-07-18

申请人： Min Yoo

发明人： Min Yoo

IPC分类号： H01L21/8242

CPC分类号： H01L29/0653 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10891

摘要： Disclosed herein is a method for forming a gate structure in a semiconductor device. The method comprises forming a SiGe film on a predetermined region of a silicon substrate corresponding to a bit-line node portion where a bit-line junction is formed, growing a silicon film over the silicon substrate having the SiGe film formed thereon, selectively etching the SiGe film, embedding a dielectric material into a portion where the SiGe film is removed, forming a stepped profile on the silicon film by etching a predetermined portion of the silicon film such that the bit-line node portion is included in the stepped profile, and forming a gate on the silicon film having the stepped profile formed therein such that the gate overlaps the stepped profile. The dielectric pad prevents the bit-line junction from spreading downward upon operation of the gate, thereby enhancing a punch-through phenomenon.

摘要翻译： 这里公开了一种在半导体器件中形成栅极结构的方法。 该方法包括在对应于形成位线结的位线节点部分的硅衬底的预定区域上形成SiGe膜，在其上形成有SiGe膜的硅衬底上生长硅膜，选择性地蚀刻 SiGe膜，将介电材料嵌入到去除SiGe膜的部分中，通过蚀刻硅膜的预定部分使得在硅膜上形成阶梯形轮廓，使得位线节点部分包括在阶梯轮廓中，以及 在硅膜上形成具有形成在其中的阶梯轮廓的栅极，使得栅极与阶梯轮廓重叠。 电介质垫在栅极操作时防止位线结面向下扩展，从而增强穿通现象。

公开(公告)号：US20060156980A1

公开(公告)日：2006-07-20

申请号：US11321491

申请日：2005-12-29

申请人： Seok-jun Won ,  Yong-min Yoo ,  Dae-youn Kim ,  Young-hoon Kim ,  Dae-jin Kwon ,  Weon-hong Kim

发明人： Seok-jun Won ,  Yong-min Yoo ,  Dae-youn Kim ,  Young-hoon Kim ,  Dae-jin Kwon ,  Weon-hong Kim

IPC分类号： C23C16/00 ,  C03C25/68 ,  H01L21/306 ,  H01L21/302 ,  H01L21/31

CPC分类号： C23C16/45544 ,  C23C16/0272 ,  C23C16/403 ,  C23C16/405 ,  C23C16/4402 ,  C23C16/45561 ,  C23C16/45574 ,  H01L21/00 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/28562 ,  Y10T137/0318

摘要： An apparatus and method for fabricating a semiconductor device using a 4-way valve with improved purge efficiency by improving a gas valve system by preventing dead volume from occurring are provided. The apparatus includes a reaction chamber in which a substrate is processed to fabricate a semiconductor device; a first processing gas supply pipe supplying a first processing gas into the reaction chamber; a 4-way valve having a first inlet, a second inlet, a first outlet, and a second outlet and installed at the first processing gas supply pipe such that the first inlet and the first outlet are connected to the first processing gas supply pipe; a second processing gas supply pipe connected to the second inlet of the 4-way valve to supply a second processing gas; a bypass connected to the second outlet of the 4-way valve; and a gate valve installed at the bypass.

公开(公告)号：US20060089171A1

公开(公告)日：2006-04-27

申请号：US11062984

申请日：2005-02-22

申请人： Kyung-Min Yoo ,  Doo-Youn Lee

发明人： Kyung-Min Yoo ,  Doo-Youn Lee

IPC分类号： H04B1/38

CPC分类号： H04M1/0262 ,  H04M1/15 ,  H04M1/72527 ,  H04W88/02

摘要： A mobile phone having a USB interface and including a main body and a battery pack removably mounted to the main body is provided. The mobile phone includes a USB connector that may be connected to an external device to allow data transmission between the external device and the mobile phone; a holding unit for containing the USB connector and from which the USB connector may be withdrawn; and a housing mounted in the mobile phone and including a flash memory for storing data, and a controller for controlling a data signal of the flash memory through the USB connector.

摘要翻译： 提供一种具有USB接口并且包括可拆卸地安装到主体的主体和电池组的移动电话。 手机包括可连接到外部设备的USB连接器，以允许外部设备和移动电话之间的数据传输; 用于容纳所述USB连接器的保持单元，并且所述USB连接器可从所述保持单元中取出; 以及安装在移动电话中并且包括用于存储数据的闪存的外壳，以及用于通过USB连接器控制闪存的数据信号的控制器。

公开(公告)号：US10157191B2

公开(公告)日：2018-12-18

申请号：US12860509

申请日：2010-08-20

申请人： Keum-koo Lee ,  Ji-young Kwahk ,  Seung-dong Yu ,  Hyun-joo Oh ,  Yeon-hee Roh ,  Joon-hwan Kim ,  Soung-min Yoo

发明人： Keum-koo Lee ,  Ji-young Kwahk ,  Seung-dong Yu ,  Hyun-joo Oh ,  Yeon-hee Roh ,  Joon-hwan Kim ,  Soung-min Yoo ,  Min-jung Park

IPC分类号： G06F3/033 ,  G06F17/30 ,  G06F3/0488

摘要： A metadata tagging system, an image searching method, a device, and a gesture tagging method are provided. The metadata tagging system includes a first device which tags metadata to an image and transmits the image tagged with the metadata and a second device which allows at least one image from among stored images to be searched. Accordingly, generated data may be searched and used more easily and conveniently.

公开(公告)号：US20160284706A1

公开(公告)日：2016-09-29

申请号：US15014928

申请日：2016-02-03

申请人： Jae-yup CHUNG ,  Jong-shik YOON ,  Hwa-sung RHEE ,  Hee-don JEONG ,  Je-Min YOO ,  Kyu-man CHA ,  Jong-mil YOUN ,  Hyun-jo KIM

发明人： Jae-yup CHUNG ,  Jong-shik YOON ,  Hwa-sung RHEE ,  Hee-don JEONG ,  Je-Min YOO ,  Kyu-man CHA ,  Jong-mil YOUN ,  Hyun-jo KIM

IPC分类号： H01L27/092 ,  H01L27/02 ,  H01L29/06 ,  H01L29/78 ,  H01L27/088

CPC分类号： H01L27/0924 ,  H01L21/76229 ,  H01L21/76232 ,  H01L21/823821 ,  H01L21/82385 ,  H01L21/823878 ,  H01L27/0207 ,  H01L27/0886 ,  H01L29/7846

摘要： An integrated circuit (IC) device includes a fin-type active region formed in a substrate, a step insulation layer on at least one sidewall of the fin-type active region, and a first high-level isolation layer on the at least one sidewall of the fin-type active region. The fin-type active region protrudes from the substrate and extending in a first direction parallel to a main surface of the substrate, includes a channel region having a first conductivity type, and includes the stepped portion. The step insulation layer contacts the stepped portion of the fin-type active region. The step insulation layer is between the first high-level isolation layer and the at least one sidewall of the fin-type active region. The first high-level isolation layer extends in a second direction that is different from the first direction.

摘要翻译： 集成电路（IC）装置包括形成在衬底中的翅片型有源区，翅片型有源区的至少一个侧壁上的阶梯绝缘层，以及至少一个侧壁上的第一高电平隔​​离层 的鳍式活性区域。 翅片型有源区域从基板突出并且在平行于基板的主表面的第一方向上延伸，包括具有第一导电类型的沟道区域，并且包括台阶部分。 台阶绝缘层接触翅片型有源区的台阶部分。 台阶绝缘层在第一高电平隔​​离层和鳍式有源区的至少一个侧壁之间。 第一高级隔离层在与第一方向不同的第二方向上延伸。

公开(公告)号：US20160155741A1

公开(公告)日：2016-06-02

申请号：US14955107

申请日：2015-12-01

申请人： Je-Min YOO ,  Sangyoon KIM ,  Woosik KIM ,  Jongmil YOUN ,  Hwasung RHEE ,  Heedon JEONG

发明人： Je-Min YOO ,  Sangyoon KIM ,  Woosik KIM ,  Jongmil YOUN ,  Hwasung RHEE ,  Heedon JEONG

IPC分类号： H01L27/092 ,  H01L29/06 ,  H01L27/02

CPC分类号： H01L27/0924 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0207 ,  H01L27/0928

摘要： A semiconductor device includes a substrate with a NMOS region and a PMOS region, a device isolation layer on the substrate to define active fins, and gate patterns on the substrate to have a length direction crossing the active fins, wherein the device isolation layer includes diffusion brake regions between respective pairs of the active fins, the diffusion brake regions being disposed adjacent to each other in a width direction of the gate patterns, and wherein a width of the diffusion brake region in the NMOS region is different from a width of the diffusion brake region in the PMOS region.

摘要翻译： 半导体器件包括具有NMOS区域和PMOS区域的衬底，衬底上的器件隔离层，以限定有源散热片，以及衬底上具有与激活鳍片相交的长度方向的栅极图案，其中器件隔离层包括扩散 在各对活动翅片之间的制动区域，扩散制动区域在栅极图案的宽度方向上彼此相邻设置，并且其中，NMOS区域中的扩散制动区域的宽度不同于扩散区域的宽度 制动区域。

公开(公告)号：US08699205B2

公开(公告)日：2014-04-15

申请号：US13599034

申请日：2012-08-30

申请人： Young Joo Oh ,  Jung Rag Yoon ,  Kyung Min Lee ,  Young Min Yoo

发明人： Young Joo Oh ,  Jung Rag Yoon ,  Kyung Min Lee ,  Young Min Yoo

IPC分类号： H01G4/06

CPC分类号： H01G4/005 ,  H01G4/008 ,  H01G4/12 ,  Y02T10/7022

摘要： Provided is a package type multi-layer thin film capacitor for large capacitance, including: a ceramic sintered body formed with slots on one side and another side thereof, respectively; a plurality of first internal electrode layers formed within the ceramic sintered body; a plurality of second internal electrode layers formed within the ceramic sintered body to be positioned between the plurality of first internal electrode layers; a pair of first main connection electrode members inserted into the slots to be connected to the first internal electrode layers or the second internal electrode layers, respectively; a pair of first main lead members inserted into the slots and to be connected to the first main connection electrode members, respectively; and a sealing member sealing the ceramic sintered body to partially expose each of the pair of first main lead members.

摘要翻译： 提供一种用于大容量的封装型多层薄膜电容器，其包括：分别在一侧和另一侧形成有狭槽的陶瓷烧结体; 形成在陶瓷烧结体内的多个第一内部电极层; 多个第二内部电极层，形成在陶瓷烧结体内，位于多个第一内部电极层之间; 一对第一主连接电极部件分别插入到与第一内部电极层或第二内部电极层连接的槽中; 一对第一主引线部件分别插入到所述槽中并与所述第一主连接电极部件连接; 以及密封构件，其密封所述陶瓷烧结体以部分地暴露所述一对第一主引导构件中的每一个。

公开(公告)号：US20140005365A1

公开(公告)日：2014-01-02

申请号：US13546975

申请日：2012-07-11

申请人： Sang Yup Lee ,  Nae Choon Yoo ,  So Young Yoo ,  Hyun Cheol Chung ,  Ki Chang Keum ,  Won Min Yoo ,  Ki Jun Jeong

发明人： Sang Yup Lee ,  Nae Choon Yoo ,  So Young Yoo ,  Hyun Cheol Chung ,  Ki Chang Keum ,  Won Min Yoo ,  Ki Jun Jeong

IPC分类号： C07K16/24

CPC分类号： C07K16/243 ,  C12Q1/6886 ,  C12Q2600/156

摘要： Disclosed are a method, a composition, a microarray, an antibody and a kit for diagnosis and prognosis of cancer, based on detection of deletion of the exon 3 region of G-CSF gene or levels of a mutated G-CSF protein having a deletion of an amino acid sequence corresponding to the exon 3 region, wherein the deletion of the exon 3 region of the G-CSF gene is used as a cancer biomarker.

摘要翻译： 公开了基于检测到G-CSF基因的外显子3区的缺失或具有缺失的突变的G-CSF蛋白的水平的方法，组合物，微阵列，抗体和用于癌症诊断和预后的试剂盒 的对应于外显子3区域的氨基酸序列，其中G-CSF基因的外显子3区域的缺失被用作癌症生物标志物。