摘要:
A system, method and computer program product are provided for depth clamping in a hardware graphics pipeline. Initially, a depth value is identified. It is then determined as to whether a hardware graphics pipeline is operating in a depth clamping mode. If the hardware graphics pipeline is operating in the depth clamping mode, the depth value is clamped within a predetermined range utilizing the hardware graphics pipeline.
摘要:
Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.
摘要:
A system adjusts floating-point-valued images prior to conversion to a display signal so that the dynamic range of the display device is effectively used. Images are adjusted using transfer functions to create an adjusted image within the dynamic range of the display device. The adjusted image also has a frequency distribution of pixel values to maximize the perception of visual detail. The system generates transfer functions from statistical attributes of one or more images. The transfer functions are applied to images on the fly as they are converted into a display signal. The statistical attributes of the image are computed on the fly as it is converted into a display signal. A first transfer function is applied to an image to produce an adjusted image in parallel with the generation of a second transfer function to be applied to a future image.
摘要:
System and method for reserving a memory space for multithreaded processing is described. Memory space within a memory resource is allocated responsive to thread type. Examples of thread types for graphics processing include primitive, vertex and fragment types. Memory space allocated may be of a predetermined size for a thread type. Memory locations within a first memory space may be interleaved with memory locations within a second memory space.
摘要:
A system, method and computer program product are provided for computer graphics processing. Initially, a height parameter is determined. Thereafter, a depth-direction component of the height parameter is calculated. A depth-value of a pixel is then modified utilizing the computed depth-direction component of the height parameter.
摘要:
Clip-less rasterization is provided by a plurality of operations. First, a primitive is received that is defined by a plurality of vertices. Each of such vertices includes a W-value. Thereafter, an area is identified based on the W-values. Such area is representative of a portion of a display to be drawn corresponding to the primitive.
摘要:
A graphics pipeline system is provided with an integrated clipping operation. First included is a transform module adapted for being coupled to a buffer to receive graphics data therefrom. Such transform module is positioned on a single semiconductor platform for transforming the graphics data from a first space to a second space. Also provided is a lighting module coupled to the transform module and positioned on the same single semiconductor platform as the transform module. The lighting module is adapted for performing lighting operations on the graphics data received from the transform module. A range clamp inversion function and a clipping operation are performed on the same single semiconductor platform as the transform module and the lighting module.
摘要:
A method for debugging an application includes obtaining first and second fusible operation requests; if there is a break point between the first and the second operation request, generating a first set of compute kernels including programs corresponding to the first operation request, but not to the second operation request; and generating a second set of compute kernels including programs corresponding the second operation request, but not to the first operation request; if there is no break point between the first and the second operation request, generating a third set of compute kernels which include programs corresponding to a merge of the first and second operation requests; and arranging for execution of either the first and second, or the third set of compute kernels, further including debugging the first or second set of compute kernels when there is a break point set between the first and second operation requests.
摘要:
A system, method and computer program product are provided for bump mapping in a hardware graphics processor. Initially, a first set of texture coordinates is received. The texture coordinates are then multiplied by a matrix to generate results. A second set of texture coordinates is then offset utilizing the results. The offset second set of texture coordinates is then mapped to color.
摘要:
A method for debugging an application includes obtaining first and second fusible operation requests; if there is a break point between the first and the second operation request, generating a first set of compute kernels including programs corresponding to the first operation request, but not to the second operation request; and generating a second set of compute kernels including programs corresponding the second operation request, but not to the first operation request; if there is no break point between the first and the second operation request, generating a third set of compute kernels which include programs corresponding to a merge of the first and second operation requests; and arranging for execution of either the first and second, or the third set of compute kernels, further including debugging the first or second set of compute kernels when there is a break point set between the first and second operation requests.