摘要:
A quadrifilar helical antenna comprising two pairs of filars having unequal lengths and phase quadrature signals propagating thereon. A disk-like impedance matching element disposed at a lower end of the antenna matches a source impedance to an antenna impedance. In certain embodiments a first crossbar connector on a substrate disposed at an upper end of the antenna electrically connects two helical filars to form a first filar pair and a second crossbar connector disposed on the substrate connects two filars to form a second filar pair.
摘要:
A quadrifilar helical antenna comprising two pairs of filars having unequal lengths and phase quadrature signals propagating thereon. A disk-like impedance matching element disposed at a lower end of the antenna matches a source impedance to an antenna impedance. In certain embodiments a first crossbar connector on a substrate disposed at an upper end of the antenna electrically connects two helical filars to form a first filar pair and a second crossbar connector disposed on the substrate connects two filars to form a second filar pair.
摘要:
There are provided a nonvolatile memory device and a method of fabricating the same. A gate region of the nonvolatile memory device is formed as a stack structure including a tunnel oxide layer, a trapping layer, a blocking layer and a control gate electrode. The trapping layer is formed of a high-k dielectric having a higher dielectric constant than that of the tunnel oxide layer. When the trapping layer is formed of high-k dielectric, an EOT in a same thickness can be reduced, and excitation of electrons of the control gate electrode to the tunnel oxide layer due to a high potential barrier relative to the tunnel oxide layer is prevented so that program and erase voltages can be further reduced. As such, a problem that the tunnel oxide layer is damaged due to the conventional high program and erase voltages can be solved by reducing the program and erase voltages, and program and erase speeds of the transistor can be further improved.
摘要:
A gas injection apparatus, which can sequentially supply a substrate with at least two kinds of source gases reacting with each other in a container, and thin film deposition equipment including the gas injection apparatus, are provided. The gas injection apparatus includes a base plate, a first gas supply region protruding from the base plate, a second gas supply region protruding from the base plate and adjacent the first gas supply region, and a trench defined by a sidewall of the first gas supply region and a sidewall of the second gas supply region. The sidewall of the first gas supply region and the sidewall of the second gas supply region face each other and extend in a radial direction on the base plate.
摘要:
An apparatus for cutting a flat display panel prevents a light emitting surface of a flat display panel from being damaged due to a pit or a scratch. The apparatus for cutting a flat display panel includes a stage supporting a rear substrate of the flat display panel, a chip blocking unit disposed to correspond to a non-scrap portion of the flat display panel, and a scrap breaker to grip a scrap portion of the flat display panel that is to be separated from the flat display panel. A scribing line is formed between the scrap portion and a non-scrap portion of the flat display panel.
摘要:
An encapsulation apparatus capable of securely sealing a gap of a display panel and improving intensity of the display panel, and a method of manufacturing an organic light emitting display device using the encapsulation apparatus are taught. The encapsulation apparatus includes an injection port having tapered projecting edges formed in both sides of one end the injection port, and injecting a reinforcing material into a gap of a display panel in a dual surface contact manner, the first substrate and the second substrate being attached to each other using a sealant; and a supporter coupled to the injection port and supporting the injection port.
摘要:
Provided is a method of synthesizing an ITO electron beam resist and a method of forming an ITO pattern. The ITO electron beam resist is synthesized by dissolving indium chloride tetrahydrate and tin chloride dihydrate in 2-ethoxy ethanol. The method of forming an ITO pattern includes: forming an ITO electron beam resist film on a substrate, forming an ITO electron beam resist pattern by patterning the ITO electron beam resist film, and forming an ITO pattern by annealing the ITO electron beam resist pattern.
摘要:
A method of fabricating a semiconductor device according to an example embodiment may include forming an isolation layer defining an active region in a semiconductor substrate, forming a silicon pattern and a sacrificial pattern on the active region, the sacrificial pattern including a semiconductor material different from the silicon pattern, forming a gate spacer on a sidewall of the silicon pattern and a sidewall of the sacrificial pattern, removing the sacrificial pattern to expose a top surface of the silicon pattern, and/or forming a gate silicide on the silicon pattern.
摘要:
An apparatus for cutting a flat display panel to prevent a light emitting surface of the flat display panel from becoming defective and contaminated while cutting the flat display panel is disclosed. The apparatus for cutting a flat display panel includes a stage to support a rear substrate of a flat display panel, a scribing support block to support a front substrate the flat display panel, a cutter to scribe the rear substrate of the flat display panel, and a scrap breaker to grip a scrap portion of the flat display panel that is to be separated from the flat display panel after cutting process of the flat display panel.
摘要:
Provided are a metal oxide semiconductor (MOS) transistor and a complementary MOS (CMOS) transistor each having a strained channel epi layer, and methods of fabricating the transistors. The MOS transistor may include at least one active region defined by an isolation structure formed in a substrate. At least one channel trench may be formed in a part of the at least one active region. At least one strained channel epi layer may be in the at least one channel trench. At least one gate electrode may be aligned on the at least one strained channel epi layer. Sources/drains may be arranged in the at least one active region along both sides of the at least one strained channel epi layer.