Computing processor with memoryless function units each connected to
different part of a multiported memory
    61.
    发明授权
    Computing processor with memoryless function units each connected to different part of a multiported memory 失效
    具有无记忆功能单元的计算处理器,每个连接到多端口存储器的不同部分

    公开(公告)号:US4740894A

    公开(公告)日:1988-04-26

    申请号:US844468

    申请日:1986-03-26

    申请人: Richard F. Lyon

    发明人: Richard F. Lyon

    CPC分类号: G06F15/8007 G06F15/167

    摘要: A processing element may be used either separately or in an array of similar processing elements for performing concurrent data processing calculations. The processing element includes a multiported memory unit for storing data to be processed by any of a plurality of function units which are connected to the multiported memory unit. The multiported memory unit includes a number of data storage slots for storing data words to be processed and the results of said processing. Each function unit performs a calculation having as its inputs one or or more data words from the multiported memory unit. The result of this calculation is stored back in the multiported memory unit. The transfer of data to and from the function units is accomplished by use of the ports on said multiported memory unit. The data manipulated by the processing element is controlled by specifying a correspondence between data storage slots, memory input ports and memory output ports.

    摘要翻译: 处理元件可以单独地或者用于执行并行数据处理计算的类似处理元件的阵列中使用。 处理元件包括多端口存储器单元,用于存储要被连接到多端口存储器单元的多个功能单元中的任一个处理的数据。 多端口存储器单元包括用于存储要处理的数据字和所述处理结果的多个数据存储槽。 每个功能单元执行具有来自多端口存储器单元的一个或多个数据字作为其输入的计算。 该计算的结果存储在多端口存储器单元中。 通过使用所述多端口存储器单元上的端口来实现向功能单元传送数据和从其传送数据。 通过指定数据存储槽,存储器输入端口和存储器输出端口之间的对应关系来控制由处理元件操纵的数据。