公开(公告)号：US20070165764A1

公开(公告)日：2007-07-19

申请号：US10573678

申请日：2004-09-23

申请人： Vincent Fusco ,  Thorsten Brabetz ,  Neil Buchanan

发明人： Vincent Fusco ,  Thorsten Brabetz ,  Neil Buchanan

IPC分类号： H03D3/24

CPC分类号： H03C3/0975 ,  H03C3/0941 ,  H03C3/0966 ,  H03F3/195 ,  H03F3/45475

摘要： A phase conjugate circuit is disclosed for deriving phase conjugation information from a main input signal of a given frequency comprising: an input receiving a reference input signal; at least one phase locked loop circuit comprising an oscillator having a main output signal, an input receiving a PLL input signal, an input receiving a feedback signal from the oscillator and at least one phase detecting means, wherein the phase detection means detects any phase difference between the PLL input is signal and the feedback signal and provides a phase control signal to the oscillator. Ion one embodiment, the main input signal is mixed with the main out put signal to provide the feedback signal and the reference signal is the PLL input signal. In an alternative embodiment, the reference signal is mixed with the main output signal to produce the feedback signal and the main input signal is the PLL input signal. In a further alternative embodiment, the main input signal is mixed with the reference signal to provide the PLL input signal and the main output signal is the feedback signal.

摘要翻译： 公开了一种用于从给定频率的主输入信号导出相位共轭信息的相位共轭电路，包括：接收参考输入信号的输入; 至少一个锁相环电路，包括具有主输出信号的振荡器，接收PLL输入信号的输入端，接收来自振荡器的反馈信号的输入端和至少一个相位检测装置，其中相位检测装置检测任何相位差 在PLL输入之间是信号和反馈信号，并向振荡器提供相位控制信号。 离子一实施例中，主输入信号与主输出信号混合以提供反馈信号，参考信号为PLL输入信号。 在替代实施例中，参考信号与主输出信号混合以产生反馈信号，并且主输入信号是PLL输入信号。 在另一替代实施例中，主输入信号与参考信号混合以提供PLL输入信号，并且主输出信号是反馈信号。

公开(公告)号：US07205849B2

公开(公告)日：2007-04-17

申请号：US11141591

申请日：2005-05-31

申请人： Stefan Herzinger ,  Günter Märzinger

发明人： Stefan Herzinger ,  Günter Märzinger

IPC分类号： H03L7/085 ,  H03L7/093

CPC分类号： H03C3/0983 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0966 ,  H03C3/0975 ,  H03L7/0891 ,  H03L7/093 ,  H03L7/18

摘要： A phase locked loop PLL having a forward path and a feedback path is disclosed. A phase detector drives an oscillator in the forward path of the phase locked loop. The feedback path includes a frequency divider that connects the oscillator output to the phase detector. The phase locked loop further includes an integrator-free loop filter configured to control the oscillator. The integrator-free loop filter enables a reduction in the required PLL bandwidth without reducing the signal quality when the PLL is used as a modulator.

摘要翻译： 公开了具有正向路径和反馈路径的锁相环PLL。 相位检测器驱动锁相环的正向路径中的振荡器。 反馈路径包括将振荡器输出连接到相位检测器的分频器。 锁相环还包括被配置为控制振荡器的无积分器环路滤波器。 无需集成器的环路滤波器可以在PLL用作调制器时降低所需的PLL带宽，而不会降低信号质量。

公开(公告)号：US20070035345A1

公开(公告)日：2007-02-15

申请号：US10547653

申请日：2004-03-04

申请人： William Siddall

发明人： William Siddall

IPC分类号： H03L7/00

CPC分类号： H03C3/0983 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0975 ,  H03L7/185 ,  H03L2207/50

摘要： A control loop (10) for producing an output signal with a stable nominal frequency is provided. The control loop includes inputs for reference (11) and oscillator (25) output signals, a beat frequency generator (12) for producing a signal with a frequency that is the difference between the oscillator and reference signal frequencies, an ADC (14) to convert the beat frequency to a digital beat frequency signal, an estimator (17) for estimating the frequency or phase of the beat signal, an adder (18) for combining an offset and modulation signal and the estimated frequency or phase of the beat signal into an added signal, and a DAC (23) for generating an analogue control signal for controlling the oscillator output frequency.

摘要翻译： 提供了用于产生具有稳定标称频率的输出信号的控制回路（10）。 控制回路包括用于参考（11）和振荡器（25）输出信号的输入，用于产生具有作为振荡器和参考信号频率之间的差的频率的信号的拍频产生器（12），ADC（14）至 将拍频转换为数字拍频信号，用于估计拍频信号的频率或相位的估计器（17），用于将偏移和调制信号与估计的拍频信号的频率或相位组合的加法器（18） 一个附加的信号，以及一个用于产生用于控制振荡器输出频率的模拟控制信号的DAC（23）。

公开(公告)号：US20050104669A1

公开(公告)日：2005-05-19

申请号：US10947847

申请日：2004-09-23

申请人： Stefan Herzinger ,  Gunter Marzinger ,  Burkhard Neurauter ,  Robert Weigel

发明人： Stefan Herzinger ,  Gunter Marzinger ,  Burkhard Neurauter ,  Robert Weigel

IPC分类号： H03C3/09 ,  H03L7/00

CPC分类号： H03C3/0975 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941

摘要： A two-point modulator arrangement is specified, said arrangement being developed with respect to conventional two-point modulators to the effect that the high-pass coupling-in point of the modulator that comprises a phase locked loop is formed by an expanded loop filter. In accordance with the present principle, the expanded loop filter comprises a coupling-in element, at which the modulation signal is combined with the output signal of a phase comparator. A voltage-controlled oscillator having only one tuning input can thus advantageously be used.

摘要翻译： 指定了两点调制器布置，所述布置相对于传统的两点调制器被展开，使得包括锁相环的调制器的高通耦合点由扩展环路滤波器形成。 根据本原理，扩展环路滤波器包括耦合入元件，其中调制信号与相位比较器的输出信号组合。 因此，可以有利地使用仅具有一个调谐输入的压控振荡器。

公开(公告)号：US20050024154A1

公开(公告)日：2005-02-03

申请号：US10928040

申请日：2004-08-28

申请人： Shervin Moloudi

发明人： Shervin Moloudi

IPC分类号： H03C3/09 ,  H03L7/089 ,  H03L7/099 ,  H03L7/10 ,  H03L7/00

CPC分类号： H03C3/0975 ,  H03L7/0891 ,  H03L7/099 ,  H03L7/10 ,  H03L2207/06

摘要： A controlled oscillation module includes a current source, an inductive load, a switching transistor section, and an adjustable parameter module. The switching transistor section is operably coupled to the current source and to the inductive load to convert a control signal into an output oscillation in accordance with an adjustable operating parameter of the controlled oscillation module. The adjustable parameter module is operably coupled to produce the adjustable operating parameter.

摘要翻译： 受控振荡模块包括电流源，感性负载，开关晶体管部分和可调参数模块。 开关晶体管部分可操作地耦合到电流源和感应负载，以根据受控振荡模块的可调节的操作参数将控制信号转换成输出振荡。 可调参数模块可操作地连接以产生可调节的操作参数。

公开(公告)号：US20040201427A1

公开(公告)日：2004-10-14

申请号：US10409213

申请日：2003-04-08

发明人： Shervin Moloudi

IPC分类号： H03L007/00

CPC分类号： H03C3/0975 ,  H03L7/0891 ,  H03L7/099 ,  H03L7/10 ,  H03L2207/06

摘要： A phase locked loop includes a difference detector, a loop filter, a controlled oscillation module, and a frequency translation module. The difference detector is operably coupled to determine a difference signal based on phase and/or frequency differences between a feedback oscillation and a reference oscillation. The loop filter is operably coupled to generate a control signal from the difference signal. The controlled oscillation module is operably coupled to produce, in accordance with an adjustable operating parameter, an output oscillation based on the controlled signal. The adjustable operating parameter is set based on desired operating conditions of the phase locked loop such that false locking of the phase locked loop is substantially avoided. The frequency translation module is operably coupled to produce the feedback oscillation from the output oscillation based on a frequency translation rate.

摘要翻译： 锁相环包括差分检测器，环路滤波器，受控振荡模块和频率转换模块。 差分检测器可操作地耦合以基于反馈振荡和参考振荡之间的相位和/或频率差来确定差分信号。 环路滤波器可操作地耦合以从差分信号产生控制信号。 受控振荡模块可操作地耦合以根据可调节的操作参数产生基于受控信号的输出振荡。 基于锁相环的期望操作条件来设定可调操作参数，从而基本上避免了锁相环的假锁定。 频率转换模块可操作地耦合以基于频率转换速率从输出振荡产生反馈振荡。

公开(公告)号：US20040087285A1

公开(公告)日：2004-05-06

申请号：US10287382

申请日：2002-11-04

申请人： MOTOROLA, INC.

发明人： Gregory Black ,  Daniel B. Schwartz ,  Kevin Traylor

IPC分类号： H04B001/04 ,  H01Q011/12 ,  H04B001/06 ,  H04B007/00

CPC分类号： H01Q3/267 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0975 ,  H03L7/1974

摘要： Voltage controlled oscillator (VCO) gain tracking is used for programming modulation gain settings to minimize modulation distortion in a low bandwidth phase locked loop of a mobile station (10). A synthesizer (20) generates a tuning voltage (Vt) for controlling a frequency of a voltage controlled oscillator (VCO) modulated radio frequency signal. A controller (22) outputs a modulation data signal and includes an analog to digital converter (72) for receiving the tuning voltage from the synthesizer (20) on a VCO feedback loop (70), a gain control lookup table (LUT) (76) for storing modulation gain setting calibration data for respective mobile station sub-bands, and a gain setting digital to analog converter (DAC) (78) for outputting a modulation gain control signal to the synthesizer (20). The modulation gain setting calibration data is calibrated using a one-time or continuous calibration methodology during, respectively, a background or normal mode of mobile station operation.

摘要翻译： 压控振荡器（VCO）增益跟踪用于编程调制增益设置以使移动台（10）的低带宽锁相环中的调制失真最小化。 合成器（20）产生用于控制压控振荡器（VCO）调制的射频信号的频率的调谐电压（Vt）。 控制器（22）输出调制数据信号，并包括用于在VCO反馈回路（70）上接收来自合成器（20）的调谐电压的模数转换器（72），增益控制查找表（LUT）（76） ），用于存储各个移动台子频带的调制增益设定校准数据;以及增益设定数模转换器（DAC）（78），用于向合成器（20）输出调制增益控制信号。 分别在移动台操作的背景或正常模式下，使用一次或连续的校准方法校准调制增益设置校准数据。

公开(公告)号：US20030058053A1

公开(公告)日：2003-03-27

申请号：US10253072

申请日：2002-09-24

申请人： Samsung Electronics Co., Ltd.

发明人： Phil-Jae Jeon ,  Myoung-Su Lee

IPC分类号： H03L007/00

CPC分类号： H03C3/0975 ,  H03C3/0958 ,  H03L7/0996 ,  H03L7/0998 ,  H03L7/18

摘要： A phase locked loop (PLL) for reducing electromagnetic interference (EMI) is provided. The PLL is not sensitive to a manufacturing process, consumes less power, occupies a small layout space, and can flexibly control a modulation frequency and a modulation rate flexibly. The PLL for reducing the EMI controls the signals having a phase difference, which is n-times (where n is an integer) the basic delay time of the output signals from a voltage controlled oscillator (VCO), and determines the modulation rate. Then, the PLL repeats the procedure during the cycle of a pre-defined modulation frequency. The PLL for reducing the EMI not only reduces the EMI, but also does not require a ROM. Therefore, the layout space can be reduced and broad frequency ranges can be obtained. In addition, since the phase difference of the output signals of the VCO is controlled by logic circuits, the PLL is insensitive to changes in the manufacturing process.

摘要翻译： 提供了用于降低电磁干扰（EMI）的锁相环（PLL）。 PLL对制造过程不敏感，功耗较小，布局空间小，灵活控制调制频率和调制速率。 用于降低EMI的PLL控制具有来自压控振荡器（VCO）的输出信号的基本延迟时间的n倍（其中n是整数）的相位差的信号，并且确定调制率。 然后，PLL在预定义的调制频率的周期中重复该过程。 用于降低EMI的PLL不仅降低了EMI，而且不需要ROM。 因此，可以减小布局空间并且可以获得宽的频率范围。 此外，由于VCO的输出信号的相位差由逻辑电路控制，所以PLL对制造过程的变化不敏感。

公开(公告)号：US20020158696A1

公开(公告)日：2002-10-31

申请号：US10006607

申请日：2001-11-30

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Robert B. Staszewski ,  Dirk Leipold ,  Khurram Muhammad ,  Chih-Ming Hung

IPC分类号： H03B007/12

CPC分类号： H03C3/0975 ,  H03C3/0941 ,  H03C3/095 ,  H03C3/0958 ,  H03C3/0966 ,  H03K19/0016 ,  H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/099 ,  H03L7/16 ,  H03L2207/50 ,  H04L7/0029

摘要： A transmitter (10) based on a frequency synthesizer includes an LC tank (12) of a digitally controlled oscillator (DCO) with various arrays of capacitors. The LC tank 12 is divided into two major groups that reflect two general operational modes: acquisition and tracking. The first group (process/voltage/temperature and acquisition) approximately sets the desired center frequency of oscillation initially, while the second group (integer and fractional tracking) precisely controls the oscillating frequency during the actual operation. For highly accurate outputs, dynamic element matching (DEM) is used in the integer tracking controller to reduce non-linearities caused by non-uniform capacitor values. Also, a preferred range of the integer tracking capacitor array may be used for modulation after the selected channel has been acquired. A digital sigma-delta modulator circuit (50) drives a capacitor array (14d) in response to the fractional bits of the error word. On mode switches, the accumulated error is recalculated to a phase restart value to prevent perturbations.

摘要翻译： 基于频率合成器的发射机（10）包括具有各种电容器阵列的数字控制振荡器（DCO）的LC箱（12）。 液相色谱箱12分为反映两种一般操作模式的两个主要组：采集和跟踪。 第一组（过程/电压/温度和采集）最初初始化设置所需的中心振荡频率，而第二组（整数和分数跟踪）在实际操作期间精确地控制振荡频率。 对于高精度输出，在整数跟踪控制器中使用动态元件匹配（DEM）来减少由非均匀电容值引起的非线性。 此外，在获取所选择的信道之后，整数跟踪电容器阵列的优选范围可以用于调制。 数字Σ-Δ调制器电路（50）响应错误字的分数位驱动电容器阵列（14d）。 在模式开关上，累加误差被重新计算到相位重启值，以防止扰动。

公开(公告)号：US06420940B1

公开(公告)日：2002-07-16

申请号：US09622213

申请日：2000-08-14

申请人： Brian J Minnis ,  Pascal Philippe

发明人： Brian J Minnis ,  Pascal Philippe

IPC分类号： H04L2712

CPC分类号： H04L27/2017 ,  H03C3/0975 ,  H03C2200/0058 ,  H03L7/185 ,  H03M3/40 ,  H03M3/404 ,  H03M3/43 ,  H03M3/452

摘要： A transmitter has a phase modulator and a phase locked loop that has a relatively high powered voltage controlled oscillator. The phase locked loop has a phase sensitive detector for comparing a phase comparison frequency derived from the voltage controlled oscillator output with a phase modulated intermediate frequency carrier derived from the phase modulator. The phase modulator has a reference frequency source, means for deriving four quadrature phase components of the reference frequency produced by the source and phase selection means controlled by complex modulation means for deriving the phase modulated intermediate frequency carrier by random interpolation between the four quadrature components.

摘要翻译： 发射机具有相位调制器和锁相环，其具有相对较高的受电压控制的振荡器。 锁相环具有相敏检测器，用于将从压控振荡器输出导出的相位比较频率与从相位调制器导出的相位调制中频载波进行比较。 相位调制器具有参考频率源，用于导出由复数调制装置控制的源极和相位选择装置产生的参考频率的四个正交相位分量的装置，用于通过四个正交分量之间的随机内插导出相位调制的中频载波。