公开(公告)号：US07096402B2

公开(公告)日：2006-08-22

申请号：US09901295

申请日：2001-07-09

申请人： Tetsuya Yano ,  Kazuhisa Obuchi ,  Kazuo Kawabata

发明人： Tetsuya Yano ,  Kazuhisa Obuchi ,  Kazuo Kawabata

IPC分类号： H03M13/29 ,  H03M13/45

CPC分类号： H04L1/0051 ,  H03M13/29 ,  H03M13/2957 ,  H03M13/2975 ,  H03M13/2978 ,  H03M13/2984 ,  H04L1/0055

摘要： Detection of errors in the results of turbo decoding is performed while decoding is being repeated. If absence of errors is detected, the results of decoding are output, even though repetition of the decoding operation is in progress, and further decoding is discontinued. Further, the number of times errors are detected in decoded results when decoding has been performed a set number of times is monitored and the decoding operation is executed again if the number of times errors are detected is equal to or less than a set value. Further, one of first and second decoded results output from first and second elementary decoders that construct a turbo decoder is selected as appropriate and is then output.

摘要翻译： 在重复解码时执行turbo解码结果中的错误的检测。 如果检测到不存在错误，即使解码操作的重复正在进行，输出解码结果，并且中断进一步的解码。 此外，如果检测到错误的次数等于或小于设定值，则在解码已经执行设定次数时，在解码结果中检测到错误的次数被监视，并且如果检测到错误的次数再次执行解码操作。 此外，适当地选择构成turbo解码器的第一和第二基本解码器输出的第一和第二解码结果之一，然后输出。

公开(公告)号：US20060184855A1

公开(公告)日：2006-08-17

申请号：US11225479

申请日：2005-09-13

申请人： Yan Wang ,  Eran Pisek ,  Jasmin Oz

发明人： Yan Wang ,  Eran Pisek ,  Jasmin Oz

IPC分类号： H03M13/00

CPC分类号： H03M13/6561 ,  H03M13/2978

摘要： A reconfigurable turbo decoder comprising N processing units. Each of the N processing units receives soft input data samples and decodes the received soft input data samples. The N processing units operate independently such that a first processing unit may be selected to decode the received soft input data samples while a second processing unit may be disabled. The number of processing units selected to decode the soft input data samples is determined by a data rate of the received soft input data samples. The reconfigurable turbo decoder also comprises N input data memories that store the received soft input data samples and N extrinsic information memories that store extrinsic information generated by the N processing units. Each of the N processing units is capable of reading from and writing to each of the N input data memories and each of the N extrinsic information memories.

公开(公告)号：US20060156185A1

公开(公告)日：2006-07-13

申请号：US11304994

申请日：2005-12-14

申请人： Wei-Min Zhang ,  Timothy Misko

发明人： Wei-Min Zhang ,  Timothy Misko

IPC分类号： H03M13/00

CPC分类号： H03M13/29 ,  H03M13/2978 ,  H04L1/0009 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0057 ,  H04L1/0076 ,  H04L25/14

摘要： Error correction coding across multiple channels is provided in multi-channel transmission systems. Specifically, redundancy is provided by selecting a portion of original data from each of a plurality of original channels, performing at least one encoding operation using the portions of original data to produce at least one portion of redundancy data, including the portion of redundancy data in at least one redundancy channel, and transmitting the redundancy channel along with the original channels. Error correction is achieved by receiving at least one redundancy channel and a plurality of original channels, selecting a portion of redundancy data from the redundancy channel, selecting a portion of original data from each of the original channels, and performing at least one decoding operation using the portion of redundancy data and the portions of original data to correct at least one error in the portions of original data.

公开(公告)号：US07023934B2

公开(公告)日：2006-04-04

申请号：US09952210

申请日：2001-09-12

申请人： Hau Thien Tran ,  Kelly B. Cameron ,  Thomas A. Hughes

发明人： Hau Thien Tran ,  Kelly B. Cameron ,  Thomas A. Hughes

IPC分类号： H03D1/00 ,  H03M13/03

CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

摘要： Method and apparatus for Min star calculations in a Map decoder. Min star calculations are performed by a circuit that includes a first circuit that performs an Min(A,B) operation simultaneously with a circuit that calculates a −log(1+e−|A−B|) value. The sign bit of the A−B calculation is used to select whether A or B is a minimum. The A−B calculation is also used to select either −log(1+e−|A−B|) or −log(1+e−|B−A|) as the correct calculation. In order to hasten the selection of either −log(1+e−|A−B|) or −log(1+e−|B−A|) as the correct calculation the apparatus does not wait for the A−B calculation to complete. Any bit of the A−B calculation between the third bit and final (sign bit) can be used for the selection. If an incorrect value is selected a log saturation circuit may correct the value. In addition an offset may be added −log(1+e−|A−B|) or −log(1+e−|B−A|) to assure that the calculation does not become negative, necessitating the use of an additional sign bit thereby increasing circuit complexity and slowing down the calculation. Additionally the log terms are computed based on a partial result of the A−B calculation.

摘要翻译： 地图解码器中Min Star计算的方法和装置。 最小星号计算由包括与计算-log（1 + e <| A-B | ）值的电路同时执行Min（A，B）操作的第一电路的电路执行。 A-B计算的符号位用于选择A或B是否为最小值。 AB计算还用于选择-log（1 + e ^{- | AB | ）或-log（1 + e - | BA | ）作为正确的计算 。 为了加速-log（1 + e - | AB | ）或-log（1 + e - | BA | ）的选择作为正确的计算 设备不等待AB计算完成。 第三位和第三位（符号位）之间的A-B计算的任何位都可用于选择。 如果选择了不正确的值，日志饱和电路可能会更正该值。 此外，可以添加偏移量-log（1 + e < - > AB | ）或-log（1 + e < - > BA | ），以确保计算 不会变成负值，需要使用额外的符号位，从而增加电路复杂性并减慢计算。 另外，基于A-B计算的部分结果来计算对数项。}

公开(公告)号：US20050021555A1

公开(公告)日：2005-01-27

申请号：US10897200

申请日：2004-07-22

申请人： Kelly Cameron ,  Hau Tran ,  Ba-Zhong Shen ,  Christopher Jones

发明人： Kelly Cameron ,  Hau Tran ,  Ba-Zhong Shen ,  Christopher Jones

IPC分类号： H03M13/15 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  H03M13/41 ,  H03M13/45 ,  H04L1/00 ,  G06F17/30

CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo−N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo−N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

摘要翻译： 一种并行级联（Turbo）编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列，或者对应于已由Reed-Solomon编码器提供的已经编码的数据序列。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法（例如块或随机交织）的加法规则进行交织，其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数），因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的，那么输出元组可以从编码器顺序选择，也不会丢失元组。 如果输入元组包含多个比特，那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器，或者所有编码器可以具有交织器，无论输入元组位是否独立交错。 模式类型交织也允许并行解码。

公开(公告)号：US20050010854A1

公开(公告)日：2005-01-13

申请号：US10608831

申请日：2003-06-26

申请人： Mark Bickerstaff

发明人： Mark Bickerstaff

IPC分类号： H03M13/29 ,  H03M13/45 ,  H03M13/00

CPC分类号： H03M13/3905 ,  H03M13/2957 ,  H03M13/2972 ,  H03M13/2978 ,  H03M13/395 ,  H03M13/6511

摘要： A turbo decoder having two modes of operation decodes received information as per an N-state Radix-K trellis where N and K are integers equal to 1 or greater. The turbo decoder uses an in-line addressing technique that allows it to operate as a Serial Convolutional Code decoder in the first mode of operation and a Parallel Convolutional Code decoder in the second mode of operation. The decoder uses an in line addressing technique that allows it to use the same block of memory to store and retrieve states of the trellis as it processes received information. The turbo decoder can also operate as per an N-state Radix-K trellis where N is an integer equal to 2 or greater and K is an integer equal to 4 or greater.

摘要翻译： 具有两种操作模式的turbo解码器根据N状态的基数K格网解码接收到的信息，其中N和K是等于1或更大的整数。 turbo解码器使用在线寻址技术，其允许其在第一操作模式中作为串行卷积码解码器操作，并且在第二操作模式中使用并行卷积码解码器。 解码器使用在线寻址技术，允许它在处理接收到的信息时使用相同的存储器块来存储和检索格状态。 turbo解码器也可以按照N状态的基数K网格进行操作，其中N是等于2或更大的整数，K是等于4或更大的整数。

公开(公告)号：US20040210812A1

公开(公告)日：2004-10-21

申请号：US10843655

申请日：2004-05-11

申请人： BROADCOM CORPORATION

发明人： Kelly B. Cameron ,  Ba-Zhong Shen ,  Hau Thien Tran ,  Christopher R. Jones ,  Thomas Ashford Hughes JR.

IPC分类号： G06F011/00 ,  H04L001/00 ,  G06F011/30 ,  H03M013/00 ,  G08C025/00

CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Soloman encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

摘要翻译： 一种并行级联（Turbo）编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列，或者对应于已经编码的数据序列，例如由Reed-Soloman编码器提供的。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法（例如块或随机交织）的加法规则进行交织，其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数），因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的，那么输出元组可以从编码器顺序选择，也不会丢失元组。 如果输入元组包含多个比特，那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器，或者所有编码器可以具有交织器，无论输入元组位是否独立交错。 模式类型交织也允许并行解码。

公开(公告)号：US20020048331A1

公开(公告)日：2002-04-25

申请号：US09952212

申请日：2001-09-12

发明人： Hau Thien Tran ,  Kelly B. Cameron ,  Ba-Zhong Shen ,  Christopher R. Jones

IPC分类号： H04L027/06

CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

摘要： A method of normalization of forward metric (alpha) and reverse metric (beta) in a MAP decoder. In a map decoder log values of probabilities may be continually added. This continual addition can overflow limited size registers set aside to hold the alpha or beta values. This overflow may be overcome by subtracting a constant value from all of the alpha or beta values when they have reached a certain value, a process called normalization. Subtracting a constant value however may slow down the computation. Instead of adversely affecting the computation speed however the detection of a constant value may occur on one decoding cycle and the normalization may occur on the succeeding decoding cycle. Additionally instead of using a traditional subtraction circuit a multiplexor type circuit can be used to direct either zeros, in the normalization case, or a most significant bit(s), in the case where the computation were proceeding without normalization, into the register holding the alpha or beta values. Additionally to minimize the impact on the computation by the normalization process, the multiplexor circuit can be set by the previous decoder cycle so that the computation does not have to wait for the multiplexor to be set to normalization or normal computation.

摘要翻译： 在MAP解码器中正向度量（alpha）和反向度量（β）归一化的方法。 在地图解码器中，可以不断地添加概率的日志值。 这种连续添加可以溢出限制大小的寄存器，以保留α或β值。 当这些溢出达到一定值时，可以通过从所有α或β值中减去常数值来克服这个溢出，称为规范化过程。 减去常数值可能会减慢计算速度。 代替不利地影响计算速度，但是在一个解码周期可能发生常数值的检测，并且归一化可能在随后的解码周期上发生。 另外，除了使用传统的减法电路之外，可以使用多路复用器类型电路来指示在归一化情况下的零，或者在没有规范化的情况下将最高有效位引导到存储器的寄存器中 alpha或beta值。 此外，为了最小化通过归一化处理对计算的影响，可以通过先前的解码器周期来设置多路复用器电路，使得计算不必等待多路复用器被设置为归一化或正常计算。

公开(公告)号：US20010052099A1

公开(公告)日：2001-12-13

申请号：US09901295

申请日：2001-07-09

发明人： Tetsuya Yano ,  Kazuhisa Obuchi ,  Kazuo Kawabata

IPC分类号： H03M013/00

CPC分类号： H04L1/0051 ,  H03M13/29 ,  H03M13/2957 ,  H03M13/2975 ,  H03M13/2978 ,  H03M13/2984 ,  H04L1/0055

摘要： Detection of errors in the results of turbo decoding is performed while decoding is being repeated. If absence of errors is detected, the results of decoding are output, even though repetition of the decoding operation is in progress, and further decoding is discontinued. Further, the number of times errors are detected in decoded results when decoding has been performed a set number of times is monitored and the decoding operation is executed again if the number of times errors are detected is equal to or less than a set value. Further, one of first and second decoded results output from first and second elementary decoders that construct a turbo decoder is selected as appropriate and is then output.

摘要翻译： 在重复解码时执行turbo解码结果中的错误的检测。 如果检测到不存在错误，即使解码操作的重复正在进行，输出解码结果，并且中断进一步的解码。 此外，如果检测到错误的次数等于或小于设定值，则在解码已经执行设定次数时，在解码结果中检测到错误的次数被监视，并且如果检测到错误的次数再次执行解码操作。 此外，适当地选择构成turbo解码器的第一和第二基本解码器输出的第一和第二解码结果之一，然后输出。

公开(公告)号：US20170033894A1

公开(公告)日：2017-02-02

申请号：US15223596

申请日：2016-07-29

申请人： Samsung Electronics Co., Ltd.

发明人： Seok-Ki AHN ,  Jae-Yoel KIM ,  Chi-Woo LIM ,  Min JANG ,  Kwang-Taik KIM ,  Woo-Myoung PARK

IPC分类号： H04L1/00

CPC分类号： H04L1/0016 ,  H03M13/1102 ,  H03M13/136 ,  H03M13/152 ,  H03M13/296 ,  H03M13/2978 ,  H03M13/635 ,  H03M13/6356 ,  H03M13/6516 ,  H03M13/6525 ,  H04L1/005 ,  H04L1/0055 ,  H04L1/0066

摘要： A method and apparatus for channel encoding and channel decoding in a wireless communication system are provided. The channel encoding method includes generating a first parity set and a second parity set based on information bits, determining a number of additional parity bits based on a number of the information bits and a required coding rate, generating the determined number of additional parity bits using the information bits, and generating a codeword including the information bits, the first parity set, the second parity set, and the generated additional parity bits.

摘要翻译： 提供了一种用于无线通信系统中的信道编码和信道解码的方法和装置。 信道编码方法包括基于信息比特生成第一奇偶校验集和第二奇偶校验集，基于信息比特数和所需编码率确定附加奇偶校验位的数量，使用 信息比特，并且生成包括信息比特，第一奇偶校验集，第二奇偶校验集和生成的附加奇偶校验位的码字。