公开(公告)号：US10249732B1

公开(公告)日：2019-04-02

申请号：US15823856

申请日：2017-11-28

申请人： Hyundai Motor Company ,  Kia Motors Corporation

发明人： Youngkyun Jung ,  NackYong Joo ,  Junghee Park ,  Hyun Woo Noh ,  JongSeok Lee ,  Dae Hwan Chun

IPC分类号： H01L21/76 ,  H01L29/66 ,  H01L21/308 ,  H01L21/3065 ,  H01L29/423

摘要： A manufacturing method of a semiconductor device is provided. The method includes sequentially forming an n− type of layer, a p type of region, and an n+ type of region on a first surface of a substrate, forming a preliminary trench in the n− type of layer by a first etching process and forming a preliminary gate insulating layer by a first thermal oxidation process. The method includes etching the lower surface of the preliminary trench and the preliminary second portion to form a trench by a second etching process and forming a gate insulating layer in the trench by a second thermal oxidation process. The gate insulating layer includes a first and second portion. The preliminary first portion is thicker than the preliminary second portion and the first portion. The first portion thickness is equal to the thickness of the second portion.

公开(公告)号：US20190081137A1

公开(公告)日：2019-03-14

申请号：US15703084

申请日：2017-09-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Fu-Wei Yao ,  Chun Lin Tsai ,  Jiun-Lei Jerry Yu ,  Man-Ho Kwan

IPC分类号： H01L29/06 ,  H01L29/20 ,  H01L29/778 ,  H01L21/76 ,  H01L21/761 ,  H01L29/66

摘要： An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistore includes a substrate having a first doping type. The transistor also includes a channel layer positioned over the substrate and comprising a first section and a second section. The transistor further includes an active layer positioned over the channel layer. The isolation structure includes a horizontal segment, a first vertical segment, and a second vertical segment. The horizontal segment is arranged below the second section of the channel layer and continuously extends between the first vertical segment and the second vertical segment. The isolation structure has a second doping type that is different than the first doping type.

公开(公告)号：US10217765B2

公开(公告)日：2019-02-26

申请号：US15415380

申请日：2017-01-25

申请人： FUJI ELECTRIC CO., LTD.

发明人： Hiroshi Kanno ,  Hitoshi Sumida ,  Masaharu Yamaji

IPC分类号： H01L27/12 ,  H01L21/76 ,  H01L21/84 ,  H01L23/00 ,  H01L27/04 ,  H01L27/08 ,  H01L29/06 ,  H01L29/10 ,  H01L21/822 ,  H01L23/498 ,  H01L27/092 ,  H03K17/687 ,  H01L21/8238

摘要： A semiconductor integrated circuit includes a semiconductor layer of a first conductivity type which is stacked on a support substrate with an insulating layer interposed between the semiconductor layer and the support substrate, a first well region of a second conductivity type buried in an upper part of the semiconductor layer so as to be separated from the insulating layer, a second well region of the first conductivity type buried in an upper part of the first well region, and an isolation region of the first conductivity type buried in the upper part of the semiconductor layer such that the isolation region surrounds the first well region and is separated from the first well region and the insulating layer.

公开(公告)号：US10211337B2

公开(公告)日：2019-02-19

申请号：US15034286

申请日：2014-10-22

申请人： Hitachi Automotive Systems, Ltd.

发明人： Shinichirou Wada

IPC分类号： H01L29/78 ,  H01L21/76 ,  H01L29/861 ,  H01L29/868 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40

摘要： To provide a high-withstand-voltage lateral semiconductor device in which ON-resistance or drain current density is uniform at an end portion and a center portion of the device in a gate width direction. A lateral N-type MOS transistor 11 formed on an SOI substrate includes a trench isolation structure 10b filled with an insulating film at an end portion of the transistor. An anode region 6 of a diode 12 is provided adjacent to a P-type body region 1 of the transistor through the trench isolation structure 10b and a cathode region 15 of the diode 12 is also provided adjacent to an N-type drain-drift region 4 of the transistor through the trench isolation structure 10b so as to cause electric field to be applied to the trench isolation structure 10b to be zero when a voltage is applied across the transistor.

公开(公告)号：US20180374716A1

公开(公告)日：2018-12-27

申请号：US15838629

申请日：2017-12-12

申请人： International Business Machines Corporation

发明人： Karl Stathakis ,  Phillip V. Mann ,  Mark K. Hoffmeyer

IPC分类号： H01L21/56 ,  H01L21/76 ,  H01L23/24 ,  H01L23/373

摘要： A heat sink can be attached to a heat-producing electronic device by aligning an adhesive material to a surface of the heat sink, applying the adhesive material to the surface to form an outer perimeter and applying, within the outer perimeter, a thermally conductive material to the surface. The surface of the heat sink and a surface of the heat-producing electronic device can then be aligned, and the heat sink can be assembled to the heat-producing electronic device by bringing the heat-producing electronic device surface into contact with the adhesive material. The heat sink can then be affixed to the heat-producing electronic device by applying a compressive force to the assembly to activate the adhesive material.

公开(公告)号：US10164141B2

公开(公告)日：2018-12-25

申请号：US14332124

申请日：2014-07-15

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Chien-Nan Tu ,  Yu-Lung Yeh ,  Hsing-Chih Lin ,  Chien-Chang Huang

IPC分类号： H01L21/00 ,  H01L21/76 ,  H01L31/18 ,  H01L31/101 ,  H01L27/146

摘要： A semiconductor device includes a carrier wafer, a device layer, a first semiconductor layer and a second semiconductor layer. The device layer is disposed on the carrier wafer. The first semiconductor layer is disposed on the device layer, and has a first side face and a second side face opposite to the first side face, in which the first side face is adjacent to the device layer. The second semiconductor layer is disposed on the first semiconductor layer, and has a third side face and a fourth side face opposite to the third side face, in which the fourth side face of the second semiconductor layer is adjacent to the second side face of the first semiconductor layer, and the second semiconductor layer is implanted and annealed.

公开(公告)号：US10128304B2

公开(公告)日：2018-11-13

申请号：US14930183

申请日：2015-11-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wen-I Hsu ,  Min-Feng Kao ,  Jen-Cheng Liu ,  Dun-Nian Yaung ,  Tzu-Hsuan Hsu ,  Wen-De Wang

IPC分类号： H01L21/76 ,  H01L27/146 ,  H01L29/06 ,  H01L21/762 ,  H01L21/761

摘要： A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material.

公开(公告)号：US10128136B2

公开(公告)日：2018-11-13

申请号：US15671325

申请日：2017-08-08

申请人： Tokyo Electron Limited

发明人： Masahiro Fukuda ,  Hiroshi Ichinomiya ,  Koichi Obata ,  Taro Yamamoto ,  Kouichirou Tanaka

IPC分类号： H01L21/76 ,  H01L21/67 ,  B05C5/02 ,  B05C11/08 ,  B05C11/10 ,  B08B3/08 ,  B08B3/10 ,  G03F7/16 ,  H01L21/027 ,  G03F7/30

摘要： There is provided a guide member 3 in which an inclined surface 32 thereof is inclined downwardly outwards from an edge portion of a rear surface of a horizontally held wafer W; and a cylindrical surrounding member 2 which surrounds the wafer W and in which an upper peripheral portion thereof is inwardly extended obliquely upwards. Further, the surrounding member 2 has, at an inner surface side thereof, two groove portions 23 extended along an entire circumference and located above a height position of the horizontally held wafer W. If an air flow flows along the surrounding member 2, a vortex flow is formed within the groove portions 23 and stays therein. Thus, mist can be captured, so that the flow of the mist to the outside of a cup body 1 can be suppressed. Accordingly, the adhesion of the mist to the wafer W can be suppressed.

公开(公告)号：US10109585B2

公开(公告)日：2018-10-23

申请号：US15424753

申请日：2017-02-03

申请人： International Business Machines Corporation

发明人： Daniel C Edelstein ,  Chih-Chao Yang

IPC分类号： H01L21/76 ,  H01L21/28 ,  H01L21/32 ,  H01L23/52 ,  H01L23/532 ,  H01L21/768

摘要： An integrated circuit device includes a substrate including a patterned dielectric layer. The pattern includes a set of features in the dielectric for a set of metal conductor structures. An adhesion promoting layer is disposed over the set of features in the patterned dielectric. A ruthenium cobalt alloy layer is disposed over the adhesion promoting layer. A metal layer is disposed over the ruthenium cobalt alloy layer filling the set of features.

公开(公告)号：US10109579B2

公开(公告)日：2018-10-23

申请号：US15908377

申请日：2018-02-28

申请人： International Business Machines Corporation

发明人： Benjamin David Briggs ,  Lawrence A. Clevenger ,  Bartlet H. Deprospo ,  Huai Huang ,  Christopher J. Penny ,  Michael Rizzolo

IPC分类号： H01L21/76 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

摘要： A method of forming a semiconductor device, includes forming a conductive layer in a recessed portion of a porous dielectric layer, partially removing a top portion of the conductive layer while maintaining a height of the porous dielectric layer, forming a conformal cap layer on the porous dielectric layer and the conductive layer in the recessed portion, polishing the conformal cap layer to form a gap in the conformal cap layer, such that an upper surface of the porous dielectric layer is exposed through the gap and an upper surface of the conductive layer is protected by the cap layer, and performing a heat treatment to burn out a pore filler of the porous dielectric layer through the exposed upper surface of the porous dielectric layer.