摘要:
A die level integrated interconnect decal manufacturing method and apparatus for implementing the method. In accordance with the technology concerning the soldering of integrated circuits and substrates, and particularly providing for solder decal methods forming and utilization, in the present instance there are employed underfills which consist of a solid film material and which are applied between a semiconductor chip and the substrate in order to enhance the reliability of a flip chip package. In particular, the underfill material increases the resistance to fatigue of controlled collapse chip connect (C4) bumps.
摘要:
To prevent formation of entrapped underfill material between solder balls and bonding bumps, fast temperature ramping is employed during a chi assembly after application of an underfill material prior to bonding. Voids formed within the underfill material are subsequently removed by curing the underfill material in a pressurized environment. Temperature cycling on the underfill material is limited during the bonding process in order to maintain viscosity of the underfill material prior to the cure process in the pressurized environment. Further, the underfill material is subjected to the pressurized environment until the cure process is complete to prevent re-formation of voids. The cure process can be a constant temperature or a multi-temperature process including temperature ramping. Further, the cure process can be a constant pressure process or a pressure cycling process that accelerates removal of the voids.
摘要:
A method for forming alloy deposits at selected areas on a receiving substrate includes the steps of: providing an alloy carrier including at least a first decal including a first plurality of openings and a second decal including a second plurality of openings, the first and second decals being arranged such that each of the first plurality of openings is in alignment with a corresponding one of the second plurality of openings; filling the first and second plurality of openings with molten alloy; cooling the molten alloy to thereby form at least first and second plugs, the first plug having a first surface and a second surface substantially parallel to one another, the second plug having a third surface and a fourth surface substantially parallel to one another; removing at least one of the first and second decals to at least partially expose the first and second plugs; aligning the alloy carrier with the receiving substrate so that the first and second plugs correspond to the selected areas on the receiving substrate; and transferring the first plug to a first of the selected areas and the second plug to a second of the selected areas.
摘要:
An electrical structure including a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要:
A portion of compliant material includes four walls defining a slot. The slot has a relatively large cross-section end in fluid communication with a solder reservoir, and also has a relatively small cross-section end opposed to the relatively large cross-section end. The slot has a generally elongate rectangular shape when viewed in plan, with a length perpendicular to a scan direction, a width, parallel to the scan direction, associated with the relatively large cross section end, and a width, parallel to the scan direction, associated with the relatively small cross section end. The slot is configured in the portion of compliant material such that the relatively small cross-section end of the slot normally remains substantially closed, but locally opens sufficiently to dispense solder from the reservoir when under fluid pressure and locally unsupported by a workpiece. Methods of operation and fabrication are also disclosed.
摘要:
An electrical structure and method of forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要:
A mask having a plurality of through holes and a mold having a plurality of cavities are provided, and the through holes and the cavities are aligned. Conductive balls ale dispensed into the aligned through holes and cavities Substantially one ball is dispensed into each aligned through hole and cavity, and the mask with the holes and the cavities in the mold ale configured and dimensioned such that the balls are substantially flush with, or recessed below, an outer surface of the mask. The mask is removed, the conductive balls are aligned with pads of a semiconductor device, and the conductive balls are transferred to the pads by fluxless reflow in a formic acid environment. Vibrational, electrostatic, and direct transfer aspects are also disclosed.
摘要:
A method and apparatus for making chip assemblies is disclosed that prevent or reduce the cracking and delamination of ultra low-k dielectrics in the back-end-of-line in Si chips that can occur during the chip assembly process. The method and apparatus apply pressure to the top and bottom surfaces of a substrate during the chip bonding process so that the bending and warping of the assembled modules are reduced. The reduced bending and warping prevent or reduce the cracking and delamination of ultra low-k dielectrics.
摘要:
Solder is simultaneously transferred from a mold to a plurality of 3D assembled modules to provide solder bumps on the modules. The mold includes cavities containing injected molten solder or preformed solder balls. A fixture including resilient pressure pads and vacuum lines extending through the pads applies pressure to the modules when they are positioned on the mold. Following reflow and solder transfer to the modules, the fixture is displaced with respect to the mold. The modules, being attached to the fixture by vacuum pressure through the pads, are displaced from the mold with the fixture.
摘要:
A method for fabricating a photovoltaic device includes performing a gettering process in a processing chamber which restricts formation of a layer of gettering materials on a substrate and forming a solder layer on the substrate. The solder layer is annealed to form uniformly distributed solder dots which grow on the substrate. The substrate is etched using the solder dots to protect portions of the substrate and form cones in the substrate such that the cones provide a three-dimensional radiation absorbing structure for the photovoltaic device.