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公开(公告)号：US20050127989A1
公开(公告)日：2005-06-16
申请号：US10500065
申请日：2002-12-10
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
IPC分类号： H04B1/10 , H03H11/26 , H03H19/00 , H03K5/1252 , H03B1/00
CPC分类号： H03H19/00 , H03H11/26 , H03H19/004 , H03K5/1252
摘要： An object is to provide a noise removing circuit that can be integrally formed on a semiconductor substrate and can improve the accuracy of noise component removal. The noise removing circuit comprises a highpass filter detecting a noise component included in an input signal, a pulse generating circuit generating a pulse signal corresponding to the detected noise component, an analog delaying circuit 252 delaying the input signal, and an outputting circuit removing the noise component included in the delayed signal according to the output timing of the pulse signal. The analog delaying circuit 252 delays the output timing of the input signal by making switches 51 to 56 electrically continuous in a sequential order, by holding the voltage of the input signal at each time point in a plurality of capacitors 81 to 86, and by extracting the held voltage before being updated by making switches 61 to 66 electrically continuous.
摘要翻译： 本发明的目的是提供一种能够整体形成在半导体衬底上的噪声消除电路，并能提高噪声成分去除的精度。 噪声消除电路包括检测包括在输入信号中的噪声分量的高通滤波器，产生对应于检测到的噪声分量的脉冲信号的脉冲发生电路，延迟输入信号的模拟延迟电路252以及去除噪声的输出电路 根据脉冲信号的输出定时包括在延迟信号中的分量。 模拟延迟电路252通过在多个电容器81至86中的每个时间点保持输入信号的电压，并通过提取开关51使电流连续的顺序来延迟输入信号的输出定时 通过使开关61至66电连续地更新之前的保持电压。
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公开(公告)号：US20050107062A1
公开(公告)日：2005-05-19
申请号：US10482003
申请日：2002-06-24
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
摘要： A receiver capable of reducing a low-frequency noise generated when a component is integrally formed on a semiconductor substrate by using CMOS process or MOS process. A high-frequency amplifier circuit 11, a mixing circuit 12, a local oscillator 13, intermediate-frequency filters 14 and 16, an intermediate-frequency amplifier circuit 15, a limit circuit 17, an FM detection circuit 18, and a stereo demodulation circuit 19 constituting an FM receiver are formed as a one-chip component 10. This one-chip component 10 is formed on a semiconductor substrate by using the CMOS process or the MOS process. The amplification elements contained in the mixing circuit 12, the intermediate-frequency filters 14 and 16, the intermediate-frequency amplifier circuit 15, and the local oscillator 13 are formed by using the p-channel type FET.
摘要翻译： 一种能够通过使用CMOS工艺或MOS工艺在半导体衬底上整体形成元件时产生的低频噪声的接收器。 高频放大器电路11，混合电路12，本地振荡器13，中频滤波器14和16，中频放大器电路15，限位电路17，FM检测电路18和立体声解调电路 形成一个FM接收器的图19所示的单芯片组件10.该单芯片组件10通过使用CMOS工艺或MOS工艺在半导体衬底上形成。 通过使用p沟道型FET来形成混频电路12，中频滤波器14,16，中频放大器电路15以及本地振荡器13的放大元件。
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公开(公告)号：US06844780B1
公开(公告)日：2005-01-18
申请号：US10494657
申请日：2002-11-12
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
CPC分类号： H03G1/00
摘要： An automatic gain control circuit integrally fabricated on a semiconductor substrate. An AGC circuit 17 controls the gain of an intermediate-frequency amplifier circuit 15 so that the average level of the output signal (sound signal) of an AM detector 16 may be substantially constant. The AGC circuit 17 includes a time-constant circuit 100, which comprises a charging circuit for intermittently charging the capacitor and a discharging circuit for intermittently discharging the same. By this intermittent charging and discharging of the capacitor having a small capacitance, a large time constant is set.
摘要翻译： 一种整体制造在半导体衬底上的自动增益控制电路。 AGC电路17控制中频放大器电路15的增益，使得AM检测器16的输出信号（声音信号）的平均电平基本上是恒定的。 AGC电路17包括时间常数电路100，其包括用于间断地对电容器充电的充电电路和用于间歇地对电容器进行放电的放电电路。 通过对具有小电容的电容器进行间歇充放电，设定大的时间常数。
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公开(公告)号：US08314449B2
公开(公告)日：2012-11-20
申请号：US12604015
申请日：2009-10-22
IPC分类号： H01L21/76
CPC分类号： H01L29/7851 , H01L21/823807 , H01L21/823821 , H01L21/82385 , H01L29/045
摘要： A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.
摘要翻译： 形成在半导体衬底上的MIS晶体管被假设为包括半导体衬底（702,910），该半导体衬底包括在主平面上的表面上具有至少两个不同晶面的突出部分（704,910B），栅极绝缘体（708 ，920B），用于覆盖构成所述突出部分的表面的所述至少两个不同晶面的每一个的至少一部分;栅电极（706,930B），包括在构成所述表面的所述至少两个不同晶面中的每一个上 所述突出部分与所述至少两个不同平面夹住所述栅极绝缘体，以及形成在所述突出部分中的所述至少两个不同晶面中的每一个的单导电型扩散区域（710a，710b，910c，910d） 并分别形成在栅电极的两侧。 这种配置允许控制元件面积的增加和通道宽度的增加。
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公开(公告)号：US07920835B2
公开(公告)日：2011-04-05
申请号：US11460968
申请日：2006-07-28
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
IPC分类号： H04B1/06
摘要： An FM transmitter with improved degree of freedom in parts selection comprises: an oscillator connected with a crystal oscillator; a clock generating circuit uses a signal formed by frequency-dividing an oscillator output as a reference frequency, and which generates a clock having a frequency of an integer multiple of the frequency of the reference frequency; a DSP operates synchronously with the clock performing stereo modulation processing, FM modulation processing, and IQ modulation processing to inputted stereo data by digital processing; a frequency synthesizer generates a reference having a frequency an integer multiple of the frequency of the reference; mixers which mix signals outputted from the DSP with signals generated by the frequency synthesizer, respectively; an adder which adds outputs of the mixers; and an amplifier which amplifies an output signal of the adder and transmits the amplified signal from an antenna.
摘要翻译： 具有提高零件选择自由度的FM发射器包括：与晶体振荡器连接的振荡器; 时钟发生电路使用通过对振荡器输出进行分频而形成的信号作为参考频率，并且生成具有参考频率的频率的整数倍的频率的时钟; DSP通过数字处理与输入立体声数据的时钟同步执行立体声调制处理，FM调制处理和IQ调制处理; 频率合成器产生具有参考频率的整数倍的频率的参考; 将从DSP输出的信号与由频率合成器产生的信号分别混合的混频器; 加法器，其添加混频器的输出; 以及放大器，其放大加法器的输出信号并从天线发射放大的信号。
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公开(公告)号：US07432769B2
公开(公告)日：2008-10-07
申请号：US10525983
申请日：2003-08-22
申请人： Isami Kato , Hiroshi Miyagi
发明人： Isami Kato , Hiroshi Miyagi
IPC分类号： H03B1/00
摘要： The oscillating unit 11 generates a signal having a frequency of n*f, i.e., n times a target frequency f. The control voltage generation circuit 21 compares the phase difference between a divided signal of a signal generated in the oscillating unit 11 and the reference signal, and outputs a DC control voltage according to the phase difference to the oscillating unit 11, thereby controlling an oscillation frequency. The divider circuit 22 converts a signal generated in the oscillating unit 11 to the target frequency f, by dividing the aforementioned signal into n equal units. By setting the oscillation frequency of the oscillating unit at n times the target frequency, the inductance and the capacitors can be formed on a semiconductor integrated circuit board.
摘要翻译： 振荡单元11产生频率为n * f的信号，即n个目标频率f的信号。 控制电压产生电路21比较在振荡单元11中产生的信号的分频信号与参考信号之间的相位差，并将相位差的DC控制电压输出到振荡单元11，由此控制振荡频率 。 分频器电路22通过将上述信号除以n等于单位将在振荡单元11中产生的信号转换为目标频率f。 通过将振荡单元的振荡频率设定为目标频率的n倍，电感和电容器可以形成在半导体集成电路板上。
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公开(公告)号：US07286804B2
公开(公告)日：2007-10-23
申请号：US10533359
申请日：2003-10-14
申请人： Hiroshi Miyagi , Isami Kato
发明人： Hiroshi Miyagi , Isami Kato
IPC分类号： E21F1/14
摘要： An object of the present invention is to provide a receiver, a digital-analog converter and a tuning circuit in which temperature compensating components can be formed on a semiconductor substrate while reducing component costs. An FM receiver 100 is constituted by including an antenna 1, a high frequency receiving circuit 2, a local oscillator 3, two digital-analog converters (DACs) 4, 6, a control section 8, a mixing circuit 9, an intermediate frequency amplification circuit 10, a detection circuit 11, a low frequency amplification circuit 12 and the speaker 13. The DACs 4, 6 have a predetermined temperature coefficient, of which output voltage is changed in accordance with ambient temperature. When a characteristic of VCO 31 is changed with variations of ambient temperature so as to cause a control voltage applied to the VCO 31 to be changed, output voltages of the DACs 4, 6 are also changed similarly.
摘要翻译： 本发明的目的是提供一种接收器，数模转换器和调谐电路，其中可以在半导体衬底上形成温度补偿部件，同时降低部件成本。 FM接收机100包括天线1，高频接收电路2，本地振荡器3，两个数模转换器（DAC）4,6，控制部分8，混合电路9，中频放大 电路10，检测电路11，低频放大电路12和扬声器13。 DAC4,6具有预定的温度系数，其输出电压根据环境温度而改变。 当VCO 31的特性随着环境温度的变化而改变，以便施加到VCO 31的控制电压被改变时，DAC4,6的输出电压也被类似地改变。
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公开(公告)号：US07280079B2
公开(公告)日：2007-10-09
申请号：US11326028
申请日：2006-01-04
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
IPC分类号： H01Q1/32
CPC分类号： H01Q1/3216
摘要： An object of the invention is to provide an adaptor device for a car radio capable of improving the receiving state. The adaptor device 20 for a car radio is connected to a vehicle-mounted antenna connection terminal 12 provided in an FM radio receiver 10 installed within a vehicle room, and includes a signal line inserted between the vehicle-mounted antenna connection terminal 12 and a vehicle-mounted antenna 110; and an in-vehicle antenna 22 branching out from the signal line. A radio wave transmitted from an FM transmitter 40 disposed within the vehicle room via an antenna 42 is received by the radio receiver 10 via the in-vehicle antenna 22.
摘要翻译： 本发明的目的是提供一种能够改善接收状态的用于汽车无线电的适配器装置。 用于汽车无线电的适配器装置20连接到设置在安装在车室内的FM无线电接收机10中的车载天线连接端子12，并且包括插入车载天线连接端子12和车辆之间的信号线 安装天线110; 以及从信号线分支出的车载天线22。 通过天线42从设置在车室内的FM发射器40发送的无线电波经由车载天线22被无线电接收机10接收。
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89.发明授权Receiver of double conversion system with antenna tuning with variable capacitance using digital-to-analog converter having temperature coefficient setting section 失效具有使用具有温度系数设定部分的数模转换器的具有可变电容的天线调谐的双转换系统的接收机公开(公告)号：US07269399B2
公开(公告)日：2007-09-11
申请号：US10533777
申请日：2003-10-14
申请人： Hiroshi Miyagi , Hiroshi Katsunaga
发明人： Hiroshi Miyagi , Hiroshi Katsunaga
IPC分类号： H04B1/18
CPC分类号： H04B1/1027 , H03D7/163 , H03J1/0008 , H04B1/28
摘要： A receiver of double conversion system wherein unwanted components included in received signals can be removed without fail and wherein the number of constituent parts has been reduced. The receiver comprises an antenna tuning circuit 10 including a tuning coil 11 and a variable-capacitance diode 13; a high frequency amplification circuit 20 for performing a high frequency amplification of a signal outputted by the antenna tuning circuit 10; two-stage mixing circuits 22, 28 for performing two frequency conversions of an output from the high frequency amplification circuit 20; and a detecting circuit 36 for detecting an output from the latter-stage mixing circuit 28.
摘要翻译： 一种双转换系统的接收机，其中包括在接收信号中的不需要的组件可以被不经意地移除，并且其中组成部件的数量已经减少。 接收机包括：天线调谐电路10，包括调谐线圈11和可变电容二极管13; 用于对天线调谐电路10输出的信号进行高频放大的高频放大电路20; 用于对来自高频放大电路20的输出进行两次频率转换的两级混合电路22,28; 以及用于检测后级混合电路28的输出的检测电路36。
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公开(公告)号：US20070142017A1
公开(公告)日：2007-06-21
申请号：US10560398
申请日：2004-06-11
CPC分类号： H01L29/1033 , H01L21/823807 , H01L21/82385 , H01L29/045 , H03D7/1441 , H03D7/1458 , H03D2200/0033 , H03D2200/0047
摘要： A mixer circuit is configured using a CMOS transistor (800), comprising a p-channel transistor (840A) and an n-channel transistor (840B) in which semiconductor substrates (810A, 810) with at least two crystal planes and a gate insulator (820A) formed on at least two of the crystal planes on the semiconductor substrate are comprised and the channel width of a channel formed in the semiconductor substrate along with the gate insulator is represented by summation of each of the channel widths of channels individually formed on said at least two crystal planes. Such a configuration allows reduction of 1/f noise, DC offset generated in output signals due to variation in electrical characteristics of a transistor element, and signal distortion based on the channel length modulation effect.
摘要翻译： 使用CMOS晶体管（800）构成混频器电路，其包括p沟道晶体管（840A）和n沟道晶体管（840B），其中具有至少两个晶体面的半导体衬底（810A，810）和 包括形成在半导体衬底上的至少两个晶面上的栅极绝缘体（820A），并且与栅极绝缘体一起形成在半导体衬底中的沟道的沟道宽度由每个沟道宽度的和 在所述至少两个晶面上分别形成的通道。 这样的配置允许减少由于晶体管元件的电特性的变化而在输出信号中产生的1 / f噪声，DC偏移以及基于沟道长度调制效应的信号失真。
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