公开(公告)号：US08239430B2

公开(公告)日：2012-08-07

申请号：US11869022

申请日：2007-10-09

申请人： David N. Ault ,  Emiliano Lozano ,  Bao G. Truong ,  Samuel I. Ward

发明人： David N. Ault ,  Emiliano Lozano ,  Bao G. Truong ,  Samuel I. Ward

IPC分类号： G06F7/00

CPC分类号： G06F7/5446

摘要： Performing a calculation using a coordinate rotation digital computer (CORDIC) algorithm. Execution of the CORDIC algorithm is begun. An error introduced by a truncated vector as a result of executing the CORDIC algorithm is pre-computed. The error is incorporated into a subsequent iteration of the CORDIC algorithm. Execution of the CORDIC algorithm is completed. The result of the CORDIC algorithm is stored.

摘要翻译： 使用坐标旋转数字计算机（CORDIC）算法进行计算。 开始执行CORDIC算法。 作为执行CORDIC算法的结果的截断向量引入的​​误差是预先计算的。 该错误被并入CORDIC算法的后续迭代中。 完成CORDIC算法的执行。 存储CORDIC算法的结果。

公开(公告)号：US20120054254A1

公开(公告)日：2012-03-01

申请号：US13159614

申请日：2011-06-14

申请人： Martin Langhammer

发明人： Martin Langhammer

IPC分类号： G06F7/487 ,  G06F7/485

CPC分类号： G06F7/548 ,  G06F1/03 ,  G06F7/483 ,  G06F7/5446 ,  G06F2101/04

摘要： Circuitry for computing a trigonometric function of an input includes circuitry for relating the input to another value to generate an intermediate value, circuitry for selecting one of the input and the intermediate value as a trigonometric input value, circuitry for determining respective initial values of a plurality of trigonometric functions for the trigonometric input value, and circuitry for deriving, based at least in part on a trigonometric identity, a final value of the first trigonometric function from the respective initial values of the plurality of trigonometric functions. The trigonometric function may be any of sine, cosine and tangent and their inverse functions. The trigonometric identities used allow a computation of a trigonometric function to be broken into pieces that either are easier to perform or can be performed more accurately.

摘要翻译： 用于计算输入的三角函数的电路包括用于将输入与另一值相关以产生中间值的电路，用于选择输入和中间值之一作为三角输入值的电路，用于确定多个的相应初始值的电路 用于三角输入值的三角函数的电路，以及用于至少部分地基于三角形标识从多个三角函数的相应初始值推导出第一三角函数的最终值的电路。 三角函数可以是任何正弦，余弦和正切以及它们的反函数。 所使用的三角形身份允许将三角函数的计算分解成更容易执行或可以更准确地执行的片段。

公开(公告)号：US20100138631A1

公开(公告)日：2010-06-03

申请号：US12326196

申请日：2008-12-02

申请人： Phanimithra GANGALAKURTI ,  Karthik Vaidyanathan ,  Partha Sarathy Murali ,  InduShehar Ayyalasomayajula

发明人： Phanimithra GANGALAKURTI ,  Karthik Vaidyanathan ,  Partha Sarathy Murali ,  InduShehar Ayyalasomayajula

IPC分类号： G06F15/76 ,  G06F9/302

CPC分类号： G06F7/5446

摘要： A CORDIC processor has a plurality of stages, each of the stages having a X input, Y input, a sign input, a sign output, an X output, a Y output, a mode control input having a ROTATE or VECTOR value, and a stage number k input, each CORDIC stage having a first shift generating an output by shifting the Y input k times, a second shift generating an output by shifting X input k times, a multiplexer having an output coupled to the sign input when the mode control input is ROTATE and to the sign of the Y input when the mode input is VECTOR, a first multiplier forming the product of the first shift output and the multiplexer output, a second multiplier forming the product of the second shift output and an inverted the multiplexer output, a first adder forming the X output from the sum of the first multiplier output and the X input, and a second adder forming the Y output from the sum of the second multiplier output and the Y input.

摘要翻译： CORDIC处理器具有多个级，每个级具有X输入，Y输入，符号输入，符号输出，X输出，Y输出，具有ROTATE或VECTOR值的模式控制输入，以及 每个CORDIC级具有通过移位Y输入k次而产生输出的第一移位，通过移位X个输入k次来产生输出的第二移位;当模式控制时，具有耦合到符号输入的输出的多路复用器 当模式输入为VECTOR时，输入为ROTATE和Y输入的符号，形成第一移位输出和多路复用器输出的乘积的第一乘法器，形成第二移位输出和反相多路复用器的乘积的第二乘法器 输出，从第一乘法器输出和X输入的和形成X输出的第一加法器和从第二乘法器输出和Y输入的和形成Y输出的第二加法器。

公开(公告)号：US20100131577A1

公开(公告)日：2010-05-27

申请号：US12324835

申请日：2008-11-27

申请人： Phanimithra Gangalakurti ,  Karthik Vaidyanathan ,  Partha Sarathy Murali ,  InduShekhar Ayyalasomayajula

发明人： Phanimithra Gangalakurti ,  Karthik Vaidyanathan ,  Partha Sarathy Murali ,  InduShekhar Ayyalasomayajula

IPC分类号： G06F7/00

CPC分类号： G06F7/5446

摘要： A CORDIC processor has a plurality of stages, each of the stages having a X input, Y input, a sign input, a sign output, an X output, a Y output, a mode control input having a ROTATE or VECTOR value, and a stage number k input, each CORDIC stage having a first shift generating an output by shifting the Y input k times, a second shift generating an output by shifting X input k times, a multiplexer having an output coupled to the sign input when the mode control input is ROTATE and to the sign of the Y input when the mode input is VECTOR, a first multiplier forming the product of the first shift output and the multiplexer output, a second multiplier forming the product of the second shift output and an inverted the multiplexer output, a first adder forming the X output from the sum of the first multiplier output and the X input, and a second adder forming the Y output from the sum of the second multiplier output and the Y input.

摘要翻译： CORDIC处理器具有多个级，每个级具有X输入，Y输入，符号输入，符号输出，X输出，Y输出，具有ROTATE或VECTOR值的模式控制输入，以及 每个CORDIC级具有通过移位Y输入k次而产生输出的第一移位，通过移位X个输入k次来产生输出的第二移位;当模式控制时，具有耦合到符号输入的输出的多路复用器 当模式输入为VECTOR时，输入为ROTATE和Y输入的符号，形成第一移位输出和多路复用器输出的乘积的第一乘法器，形成第二移位输出和反相多路复用器的乘积的第二乘法器 输出，从第一乘法器输出和X输入的和形成X输出的第一加法器和从第二乘法器输出和Y输入的和形成Y输出的第二加法器。

公开(公告)号：US20090094306A1

公开(公告)日：2009-04-09

申请号：US11869029

申请日：2007-10-09

申请人： Gahn W. Krishnakalin ,  Emiliano Lozano ,  Michael P. Potter ,  Samuel I. Ward

发明人： Gahn W. Krishnakalin ,  Emiliano Lozano ,  Michael P. Potter ,  Samuel I. Ward

IPC分类号： G06F7/38

CPC分类号： G06F7/5446

摘要： A computer-implemented method for performing a calculation using a coordinate rotation digital computer (CORDIC) algorithm. A step of the coordinate rotation digital computer algorithm is performed. As a result of performing the step, a value of the coordinate rotation digital computer algorithm is reduced. The value is shifted using a physical adder. A set of bits of the physical adder is disabled, wherein the set of bits corresponds to at least one high order zero of the value.

摘要翻译： 一种用于使用坐标旋转数字计算机（CORDIC）算法执行计算的计算机实现的方法。 执行坐标旋转数字计算机算法的步骤。 作为执行该步骤的结果，减小了坐标旋转数字计算机算法的值。 该值使用物理加法器移位。 物理加法器的一组位被禁用，其中该组位对应于该值的至少一个高阶零。

公开(公告)号：US20070237255A1

公开(公告)日：2007-10-11

申请号：US11399272

申请日：2006-04-05

申请人： John Riccio ,  Harald Wougk ,  Anthony Migliaccio

发明人： John Riccio ,  Harald Wougk ,  Anthony Migliaccio

IPC分类号： H04L27/00

CPC分类号： G06F7/5446

摘要： A system and method is provided for converting an input signal from a sequence of rectangular coordinate pairs to a sequence of polar coordinate pairs. The input signal includes a sequence of input vectors each including a pair of rectangular coordinates. A plurality of N input registers is configured to store an input vector of the input signal. The system includes a plurality of N CORDIC algorithm instances, each in communication with a corresponding one of the N input registers. Each CORDIC algorithm instance is configured to receive the input vector stored in the corresponding input register and to convert the received input vector to a corresponding output vector including a pair of polar coordinates. A recombiner is configured to receive the N output vectors and to recombine at least the N output vectors in sequence to form an output signal.

摘要翻译： 提供了一种用于将来自直角坐标对序列的输入信号转换为极坐标对序列的系统和方法。 输入信号包括每个包括一对直角坐标的输入向量序列。 多个N个输入寄存器被配置为存储输入信号的输入向量。 该系统包括多个N CORDIC算法实例，每个实例与N个输入寄存器中的相应一个通信。 每个CORDIC算法实例被配置为接收存储在相应输入寄存器中的输入向量，并将接收到的输入向量转换成包括一对极坐标的对应输出向量。 重新组合器被配置为接收N个输出向量并且至少将N个输出向量依次复合以形成输出信号。

公开(公告)号：US20060059215A1

公开(公告)日：2006-03-16

申请号：US10498707

申请日：2002-12-20

申请人： Koushik Maharatna ,  Eckhard Grass ,  Swapna Banerjee ,  Anindya Dhar

发明人： Koushik Maharatna ,  Eckhard Grass ,  Swapna Banerjee ,  Anindya Dhar

IPC分类号： G06F15/00

CPC分类号： G06F7/5446

摘要： A CORDIC unit for the iterative approximation of a vector rotation through a rotary angle θ by a number of elementary rotations through elementary angles αi, including elementary rotation stages for respectively effecting an elementary rotation through an elementary angle αi as an iteration step in the iterative approximation. After such an elementary rotation there remains a residual angle through which rotation is still to be effected. The elementary rotation stages of the CORDIC unit are adapted for rotation through elementary angles a( given by powers of two with a negative integral exponent. The CORDIC unit can also include a triggering device for triggering the elementary rotations, a triggering device which is adapted prior to each iteration step to compare the residual angle to at least one of the elementary angles and to omit those elementary rotation stages whose elementary angles are greater than the residual angle.

摘要翻译： CORDIC单元，用于通过旋转角θ迭代近似通过基本角α1的基本旋转的多个基本旋转，包括用于分别通过基本角α进行基本旋转的基本旋转级 作为迭代近似中的迭代步骤。 在这样的基本旋转之后，仍然存在剩余角度，通过该角度仍然需要进行旋转。 CORDIC单元的基本旋转级适用于旋转基本角度a（由具有负整数指数的两个功率给出），CORDIC单元还可以包括触发元件旋转的触发装置，先前适应的触发装置 到每个迭代步骤以将剩余角度与至少一个基本角度进行比较，并省略基本角度大于残余角度的基本旋转阶段。

公开(公告)号：US20030097388A1

公开(公告)日：2003-05-22

申请号：US10138652

申请日：2002-05-06

申请人： Industrial Technology Research Institute

发明人： Cheng-Shing Wu ,  Chia-Ho Pan ,  An-Yeu Wu

IPC分类号： G06F007/38

CPC分类号： G06F7/5446

摘要： A CORDIC method and a CORDIC architecture applied in vector rotation are disclosed. An elementary angles set is extended by representing the elementary angles as the arctangent of the sum of two single signed-power-of-two terms to an extended elementary angles set. A combination of elementary angles is found from the extended elementary angles set such that the residue angle error can be minimized. A quantized scaling factor is used to scale the combination of elementary angles after being micro-rotated.

摘要翻译： 公开了一种应用于矢量旋转的CORDIC方法和CORDIC架构。 通过将基本角表示为两个单个有符号幂二项的和的反正切来扩展基本角度集合到扩展基本角度集合。 从设置的扩展基本角度找到基本角度的组合，使得残余角度误差可以最小化。 量化缩放因子用于缩放微旋转后的基本角度的组合。

公开(公告)号：US20020116181A1

公开(公告)日：2002-08-22

申请号：US09951764

申请日：2001-09-10

发明人： Shoab A. Khan ,  Rehan Hameed ,  Hassan Farooq

IPC分类号： G10L019/14

CPC分类号： G06F7/57 ,  G06F7/5446 ,  G06F9/3867 ,  G06F9/3879 ,  G06F2207/3884

摘要： The present invention relates to digital signal processors with an integrated module configured to compute a Coordinate Rotation Digital Computer (CORDIC) in a pipeline. The pipelined module can advantageously complete computation of one CORDIC computation for each clock pulse applied to the CORDIC module, thereby providing a CORDIC computation for each clock pulse. One embodiment advantageously computes a first portion of a computation with a lookup table and a second portion in accordance with a CORDIC algorithm. Advantageously, data in a CORDIC pipeline is automatically advanced in response to read instructions and can be automatically advanced from the beginning of the pipeline to the end of the pipeline to reinitialize the pipeline. This allows information to be retrieved from the CORDIC pipeline with relatively little overhead. The automatic starting and stopping of the CORDIC pipeline advantageously allows the retrieval of computations from efficient pipeline architectures on an as-needed basis.

摘要翻译： 本发明涉及具有集成模块的数字信号处理器，其被配置为在流水线中计算坐标旋转数字计算机（CORDIC）。 流水线模块可以有利地完成对施加到CORDIC模块的每个时钟脉冲的一个CORDIC计算的计算，从而为每个时钟脉冲提供CORDIC计算。 一个实施例有利地根据CORDIC算法利用查找表和第二部分来计算计算的第一部分。 有利地，CORDIC流水线中的数据响应于读取指令而自动进行，并且可以从流水线的开始自动地前进到流水线的末端以重新初始化流水线。 这允许以较少的开销从CORDIC管道检索信息。 CORDIC管道的自动启动和停止有利地允许根据需要从有效管道架构中检索计算。

公开(公告)号：US06434582B1

公开(公告)日：2002-08-13

申请号：US09336394

申请日：1999-06-18

申请人： Gwangwoo Choe ,  James R. MacDonald

发明人： Gwangwoo Choe ,  James R. MacDonald

IPC分类号： G06F102

CPC分类号： G06F7/5446

摘要： A system and method for computing the cosine of an input value. The system comprises a logical processing unit and an addition unit. The logical processing unit comprises an input bus with a plurality of input lines for receiving an input angle value. The logical processing unit includes a first plurality of gates, preferably AND gates, coupled to the input bus. Each gate of the first plurality of gates couples to two or more of the input lines. The logical processing unit generates N output operands on N corresponding output buses. At least one of the output buses includes (a) at least one output line coupled to an output of one of the first plurality of gates, and (b) at least one output line coupled to one of the input lines of the input bus. The number N of output buses is greater than or equal to two. The addition unit couples to the N output buses of the logical processing unit, and is configured to perform an addition of the N binary operands provided on the N output buses. The addition unit generates a resultant number which represents the cosine of the input operand conveyed on the input bus. The input angle value is assumed to have a predetermined number of leading zeros. In general, output lines are coupled to (a) input lines, (b) outputs of gates, or (c) set equal to zero.

摘要翻译： 用于计算输入值的余弦的系统和方法。 该系统包括逻辑处理单元和加法单元。 逻辑处理单元包括具有用于接收输入角度值的多条输入线的输入总线。 逻辑处理单元包括耦合到输入总线的第一多个门，优选与门。 第一多个门的每个栅极耦合到两个或更多个输入线。 逻辑处理单元在N个对应的输出总线上产生N个输出操作数。 输出总线中的至少一个包括（a）耦合到第一多个门中的一个的输出的至少一个输出线，以及（b）耦合到输入总线的输入线之一的至少一个输出线。 输出总线数N大于或等于2。 加法单元耦合到逻辑处理单元的N个输出总线，并且被配置为执行在N个输出总线上提供的N个二进制操作数的相加。 加法单元生成表示在输入总线上传送的输入操作数的余弦的合成数。 假设输入角度值具有预定数量的前导零。 通常，输出线耦合到（a）输入线，（b）门的输出，或（c）设置为等于零。