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    3D INDEPENDENT DOUBLE GATE FLASH MEMORY ON BOUNDED CONDUCTOR LAYER
    83.
    发明申请
    3D INDEPENDENT DOUBLE GATE FLASH MEMORY ON BOUNDED CONDUCTOR LAYER 有权
    3D独立双栅格闪存存储器在接口导体层

    公开(公告)号：US20150340371A1

    公开(公告)日：2015-11-26

    申请号：US14460328

    申请日：2014-08-14

    申请人： MACRONIX INTERNATIONAL CO., LTD.

    发明人： HANG-TING LUE

    IPC分类号： H01L27/115 ,  H01L29/66 ,  H01L29/423

    CPC分类号： H01L29/66833 ,  G11C11/5671 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/10 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/11514 ,  H01L27/11551 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/42392 ,  H01L29/66

    摘要： A memory device configurable for independent double gate cells, storing multiple bits per cell, includes multilayer stacks of conductive strips configured as word lines. Active pillars are disposed between pairs of first and second stacks, each active pillar comprising a vertical channel structure extending from an underlying bounded conductive layer, a charge storage layer and an insulating layer. The insulating layer in a frustum of an active pillar contacts a first arcuate edge of a first conductive strip in a layer of the first stack and a second arcuate edge of a second conductive strip in a same layer of the second stack. The conductive strips can comprise a metal. The active pillar can be generally elliptical with a major axis parallel with the first and second conductive strips.

    摘要翻译： 可独立的双门单元配置的存储器件，每个单元存储多个位，包括配置为字线的导电条的多层堆叠。 主动柱布置在成对的第一和第二堆叠之间，每个活性柱包括从下面的有界导电层，电荷存储层和绝缘层延伸的垂直沟道结构。 有源柱的截头锥体中的绝缘层与第二堆叠的同一层中的第一堆叠层中的第一导电条的第一弧形边缘和第二导电条的第二弧形边缘接触。 导电条可以包括金属。 主动柱通常为椭圆形，长轴与第一和第二导电条平行。

    Memory device having stitched arrays of 4 F2 memory cells
    84.
    发明授权
    Memory device having stitched arrays of 4 F2 memory cells 有权
    具有4个F2存储器单元的拼接阵列的存储器件

    公开(公告)号：US09029824B2

    公开(公告)日：2015-05-12

    申请号：US14449044

    申请日：2014-07-31

    申请人： Avalanche Technology, Inc.

    发明人： Kimihiro Satoh ,  Jing Zhang ,  Yiming Huai

    IPC分类号： H01L45/00 ,  H01L29/78 ,  H01L27/24 ,  H01L27/115

    CPC分类号： H01L45/1233 ,  H01L27/11507 ,  H01L27/11514 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2454 ,  H01L27/2463 ,  H01L27/2481 ,  H01L29/7827 ,  H01L43/02 ,  H01L43/08 ,  H01L45/04 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/144 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147

    摘要： A memory device comprises a semiconductor substrate having a plurality of parallel trenches therein, a memory region formed in the substrate including an array of memory cells having a plurality of vertical selection transistors with respective channels formed in trench sidewalls, a plurality of buried source electrodes in trench bottoms, a plurality of paired gate electrodes formed on paired trench sidewalls, a first and second stitch region disposed adjacent the memory region along a trench direction including a first and second row of gate contacts, respectively, and a row of source contacts disposed in the first or second stitch region with each of the source contacts coupled to a respective one of the source electrodes. One of each pair of the gate electrodes is coupled to a respective one of the first row of gate contacts and the other one of each pair of gate electrodes is coupled to a respective one of the second row of gate contacts.

    摘要翻译： 存储器件包括其中具有多个平行沟槽的半导体衬底，形成在衬底中的存储区包括存储单元阵列，存储单元阵列具有形成在沟槽侧壁中的各个沟道的多个垂直选择晶体管，多个埋入源电​​极 沟槽底部，形成在一对沟槽侧壁上的多个成对栅极电极，分别沿着包括第一和第二排栅极触点的沟槽方向邻近存储区域设置的第一和第二缝合区域，以及一排源极触点， 第一或第二针脚区域，其中每个源极触点耦合到相应的一个源极电极。 每对栅电极中的一个耦合到第一行栅极触点中的相应一个，并且每对栅电极中的另一个耦合到第二行栅极触点的相应一个。

    Nonvolatile ferroelectric memory
    87.
    发明授权
    Nonvolatile ferroelectric memory 有权
    非易失性铁电存储器

    公开(公告)号：US07649763B2

    公开(公告)日：2010-01-19

    申请号：US11689725

    申请日：2007-03-22

    申请人： Daisaburo Takashima

    发明人： Daisaburo Takashima

    IPC分类号： G11C11/22

    CPC分类号： G11C11/22 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11507 ,  H01L27/11514 ,  H01L28/40 ,  H01L28/55

    摘要： According to an aspect of the invention, there is provided a nonvolatile ferroelectric memory, including a ferroelectric capacitor composed of a ferroelectric film sandwiched by capacitor electrodes made of a conductive material, a cell capacitor block stacked a plurality of the capacitor electrodes and the ferroelectric film of the ferroelectric capacitor perpendicular to a main surface of a silicon substrate in layer, a cell transistor having a drain electrode and a source electrode, the drain electrode and the source electrode are electrically connected to the ferroelectric capacitor in parallel, a memory cell composed of the ferroelectric capacitor and the cell transistor, a cell block having the plurality of memory cells electrically connected in series, the drain electrode and the source electrode being as a terminals, a word line, a bit line connected to one end of the cell block, the bit line being arranged along orthogonal direction to the word line and a plate line connected to the other end of the cell block, the plate line arranged along the word line.

    摘要翻译： 根据本发明的一个方面，提供了一种非易失性铁电存储器，其包括由导电材料制成的电容器电极夹持的铁电体构成的铁电电容器，堆叠多个电容电极的电池电容器块和铁电体膜 的垂直于硅衬底的主表面的铁电电容器，具有漏电极和源电极的单元晶体管，漏电极和源电极并联电连接到铁电电容器，存储单元由 铁电电容器和单元晶体管，具有串联电连接的多个存储单元的单元块，漏电极和源电极为端子，字线，连接到单元块一端的位线， 位线沿着与字线正交的方向布置，并且连接有板线 到单元格块的另一端，沿着字线排列的印版线。