Focal plane array packaging using isostatic pressure processing
    81.
    发明授权
    Focal plane array packaging using isostatic pressure processing 有权
    焦平面阵列包装采用等静压处理

    公开(公告)号:US09142694B2

    公开(公告)日:2015-09-22

    申请号:US14093728

    申请日:2013-12-02

    Abstract: A method for bonding a first semiconductor body having a plurality of electromagnetic radiation detectors to a second semiconductor body having read out integrated circuits for the detectors. The method includes: aligning electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits; tacking the aligned electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits to form an intermediate stage structure; packaging the intermediate stage structure into a vacuum sealed electrostatic shielding container having flexible walls; inserting the package with the intermediate stage structure therein into an isostatic pressure chamber; and applying the isostatic pressure to the intermediate stage structure through walls of the container. The container includes a stand-off to space walls of the container from edges of the first semiconductor body.

    Abstract translation: 一种用于将具有多个电磁辐射检测器的第一半导体本体结合到具有用于检测器的已读出集成电路的第二半导体本体的方法。 该方法包括:将多个电磁辐射检测器的电触点对准读出的集成电路的电触点; 通过读出的集成电路的电接触来对多个电磁辐射检测器的对齐的电触点进行定位,以形成中间级结构; 将中间阶段结构包装成具有柔性壁的真空密封静电屏蔽容器; 将其中间级结构的包装插入等静压压力室中; 以及通过容器的壁将等静压施加到中间阶段结构。 容器包括从第一半导体本体的边缘到容器的空间壁的间隔壁。

    INTEGRATED CIRCUIT AND MANUFACTURING METHOD
    82.
    发明申请
    INTEGRATED CIRCUIT AND MANUFACTURING METHOD 有权
    集成电路和制造方法

    公开(公告)号:US20150031158A1

    公开(公告)日:2015-01-29

    申请号:US14513352

    申请日:2014-10-14

    Applicant: NXP B.V.

    Abstract: Disclosed is an integrated circuit comprising a substrate (10) including at least one light sensor (12); an interconnect structure (20) over the substrate; at least one passivation layer (30) over the interconnect structure, said passivation layer including a first area over the at least one light sensor; and a gas sensor such as a moisture sensor (50) at least partially on a further area of the at least one passivation layer, wherein the gas sensor comprises a gas sensitive layer (46′) in between a first electrode (42) and a second electrode (44), the gas sensitive layer further comprising a portion (46″) over the first area. A method of manufacturing such an IC is also disclosed.

    Abstract translation: 公开了一种集成电路,其包括:包括至少一个光传感器(12)的基板(10) 在所述衬底上的互连结构(20); 所述互连结构上的至少一个钝化层(30),所述钝化层包括所述至少一个光传感器上的第一区域; 以及气体传感器,例如至少部分地在所述至少一个钝化层的另一区域上的湿度传感器(50),其中所述气体传感器包括在第一电极(42)和第二电极 第二电极(44),气敏层还包括在第一区域上的部分(46“)。 还公开了制造这种IC的方法。

    Array Substrate, Manufacturing Method Thereof, And Display Device
    83.
    发明申请
    Array Substrate, Manufacturing Method Thereof, And Display Device 有权
    阵列基板及其制造方法及显示装置

    公开(公告)号:US20150014692A1

    公开(公告)日:2015-01-15

    申请号:US13995926

    申请日:2012-11-06

    Inventor: Song Wu

    Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof, and a display device. The array substrate comprises: a pixel region, a data-line pad region and a gate-line pad region; the pixel region comprises: a pixel electrode, a gate electrode of a TFT, source and drain electrodes of the TFT, a connection electrode, and a common electrode; the data-line pad region comprises: an insulating layer, a semiconductor layer, a data line, and a data-line connection pad; the data line and the source and drain electrodes are of a same layer and a same material; and the gate-line pad region comprises: a gate line, an insulating layer, and a gate-line connection pad; the gate line and the gate electrode are of a same layer and a same material; and the gate-line connection pad and the source and drain electrodes are of a same layer and a same material. The array substrate can reduce the number of masks and exposure times, thereby reducing manufacturing costs and improving production efficiency.

    Abstract translation: 本发明的实施例提供阵列基板,其制造方法和显示装置。 阵列基板包括:像素区域,数据线焊盘区域和栅极线焊盘区域; 像素区域包括:像素电极,TFT的栅电极,TFT的源极和漏极,连接电极和公共电极; 数据线焊盘区域包括:绝缘层,半导体层,数据线和数据线连接焊盘; 数据线和源电极和漏电极具有相同的层和相同的材料; 并且所述栅极线焊盘区域包括:栅极线,绝缘层和栅极线连接焊盘; 栅极线和栅电极具有相同的层和相同的材料; 并且栅极线连接焊盘和源电极和漏电极具有相同的层和相同的材料。 阵列基板可以减少掩模的数量和曝光时间,从而降低制造成本并提高生产效率。

    Solid state photomultiplier with improved pulse shape readout
    84.
    发明授权
    Solid state photomultiplier with improved pulse shape readout 有权
    具有改善脉冲形状读数的固态光电倍增管

    公开(公告)号:US08886697B2

    公开(公告)日:2014-11-11

    申请号:US13729761

    申请日:2012-12-28

    CPC classification number: H01L27/144 G01T1/2018 G01T1/208

    Abstract: Exemplary embodiments are directed to shaping a readout pulse from a solid state photomultiplier (SSPM). A readout pulse can be received from the SSPM at an input of a buffer amplifier. The readout pulse can have a discharge portion with a discharge rate and a recharge portion with a recharge rate. A magnitude of the readout pulse increasing for the discharge portion and decreasing for the recharge portion. A frequency dependent input impedance circuit can be employed in electrical communication with the input of the buffer amplifier to shape the discharge portion of the readout pulse.

    Abstract translation: 示例性实施例涉及从固态光电倍增管(SSPM)形成读出脉冲。 可以在缓冲放大器的输入处从SSPM接收读出脉冲。 读出脉冲可以具有放电速率的放电部分和具有再充电速率的充电部分。 读出脉冲的大小对于放电部分而增加,并且对于再充电部分而言减小。 可以采用与频率相关的输入阻抗电路与缓冲放大器的输入端电连接,以形成读出脉冲的放电部分。

    Method and device for manufacturing thin film photoelectric conversion module
    85.
    发明授权
    Method and device for manufacturing thin film photoelectric conversion module 失效
    制造薄膜光电转换模块的方法和装置

    公开(公告)号:US08679862B2

    公开(公告)日:2014-03-25

    申请号:US12867585

    申请日:2009-01-28

    Abstract: A method for manufacturing a thin film photoelectric conversion module includes the steps of forming a plurality of photoelectric conversion elements connected in series on a substrate, and carrying out reverse bias processing simultaneously on a group of photoelectric conversion elements including a plurality of the photoelectric conversion elements positioned with one or a plurality of the photoelectric conversion elements interposed between each of them, by applying a plurality of voltages electrically isolated from one another to the group of photoelectric conversion elements.

    Abstract translation: 一种制造薄膜光电转换模块的方法包括以下步骤:在基板上串联连接的多个光电转换元件,并且在包括多个光电转换元件的一组光电转换元件上同时进行反偏压处理 通过将彼此电隔离的多个电压施加到光电转换元件组,将一个或多个光电转换元件插入其中的每一个之间。

    SOLID-STATE PHOTODETECTOR WITH VARIABLE SPECTRAL RESPONSE
    86.
    发明申请
    SOLID-STATE PHOTODETECTOR WITH VARIABLE SPECTRAL RESPONSE 有权
    具有可变光谱响应的固态光电转换器

    公开(公告)号:US20140021378A1

    公开(公告)日:2014-01-23

    申请号:US13943305

    申请日:2013-07-16

    Abstract: A solid-state photodetector with variable spectral response that can produce a narrow or wide response spectrum of incident light. Some embodiments include a solid-state device structure that includes a first photodiode and a second photodiode that share a common anode region. Bias voltages applied to the first photodiode and/or the second photodiode may be used to control the thicknesses of depletion regions of the photodiodes and/or a common anode region to vary the spectral response of the photodetector. Thickness of the depletion regions and/or the common anode region may be controlled based on resistance between multiple contacts of the common anode region and/or capacitance of the depletion regions. Embodiments include control circuits and methods for determining spectral characteristics of incident light using the variable spectral response photodetector.

    Abstract translation: 具有可变光谱响应的固态光电探测器,可产生入射光的窄或宽响应谱。 一些实施例包括固态器件结构,其包括共享公共阳极区域的第一光电二极管和第二光电二极管。 施加到第一光电二极管和/或第二光电二极管的偏压可用于控制光电二极管和/或公共阳极区域的耗尽区的厚度,以改变光电检测器的光谱响应。 可以基于公共阳极区域的多个触点和/或耗尽区域的电容之间的电阻来控制耗尽区域和/或公共阳极区域的厚度。 实施例包括使用可变光谱响应光电检测器来确定入射光的光谱特性的控制电路和方法。

    Photoreceiving device
    88.
    发明授权
    Photoreceiving device 有权
    光接收装置

    公开(公告)号:US08471349B2

    公开(公告)日:2013-06-25

    申请号:US13004519

    申请日:2011-01-11

    Abstract: The wiring arrangement length in a photoreceiving device is shortened. The photoreceiving device includes an amplifier for amplifying an output of the photoreceiving element and a photoreceiving element and they are mounted at a base member. A plurality of first bonding pads and a plurality of second bonding pads for connection to power supply are provided at both sides of a transmission path of an input or output signal of a photoreceiving element. Furthermore, at a position other than the parts arrangement surface of the base member, a plurality of first bonding pads are electrically connected to a plurality of second bonding pads.

    Abstract translation: 光接收装置中的布线长度缩短。 光接收装置包括用于放大光接收元件和光接收元件的输出的放大器,并且它们被安装在基座构件上。 在光接收元件的输入或输出信号的传输路径的两侧设置有用于连接到电源的多个第一接合焊盘和多个第二接合焊盘。 此外,在除了基底构件的部件布置表面之外的位置处,多个第一接合焊盘电连接到多个第二接合焊盘。

    Method of forming a light activated silicon controlled switch
    90.
    发明授权
    Method of forming a light activated silicon controlled switch 有权
    形成光活化硅控制开关的方法

    公开(公告)号:US08012775B2

    公开(公告)日:2011-09-06

    申请号:US12882640

    申请日:2010-09-15

    CPC classification number: H01L27/144 H01L31/1113

    Abstract: The present invention provides a method of forming an optically triggered switch. Embodiments of the method include forming a silicon layer, forming one or more trenches in the silicon layer, and forming one or more silicon diodes in the silicon layer. Embodiments of the method also include forming a first thyristor in the silicon layer such that the first thyristor is physically and electrically isolated from the silicon diode(s) by the trench(es). The first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode(s).

    Abstract translation: 本发明提供一种形成光触发开关的方法。 该方法的实施例包括形成硅层,在硅层中形成一个或多个沟槽,以及在硅层中形成一个或多个硅二极管。 该方法的实施例还包括在硅层中形成第一晶闸管,使得第一晶闸管通过沟槽与硅二极体物理和电隔离。 第一晶闸管被配置为响应于硅二极管产生的电磁辐射而导通。

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