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公开(公告)号：US07796699B2
公开(公告)日：2010-09-14
申请号：US12324421
申请日：2008-11-26
申请人： Raj Kumar Jain , Sim Hak Keong
发明人： Raj Kumar Jain , Sim Hak Keong
IPC分类号： H04K1/10
CPC分类号： H04L27/2628 , H04L27/2633
摘要： A new protocol is proposed for transmission of data through lines such as telephone lines. The tones of a signal are associated into groups 10, 11, and tone ordering, gain selection, and/or bit swapping within the processing system are done within the members of a group 10, 11. This idea is applicable both to tone ordering etc., following the training stage, and also to the dynamic configuration changes subsequently, for example, bit swapping. The computational cost of coding and decoding the data is reduced (compared to treating all the tones of a given direction equivalently), and the invention makes it possible to significantly reduce the memory requirements of the encoder and decoder.
摘要翻译： 提出了一种新的协议，用于通过诸如电话线的线路传输数据。 信号的音调被关联到组10,11中，并且处理系统内的音调排序，增益选择和/或位交换在组10,11的成员内完成。这个想法适用于音调排序等 在训练阶段之后，以及随后的动态配置变化，例如位交换。 数字编码和解码的计算成本降低（与处理给定方向的所有音调相当），本发明可以显着降低编码器和解码器的存储器要求。
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公开(公告)号：US20170010092A1
公开(公告)日：2017-01-12
申请号：US15272285
申请日：2016-09-21
发明人： Thomas Zell , Horst Kittner
IPC分类号： G01B11/27 , H01L23/544 , H01L21/68
CPC分类号： G01B11/272 , G01B11/27 , H01L21/681 , H01L23/544 , H01L2223/54426
摘要： An apparatus for detecting a pre-aligning element at a wafer and a method for pre-aligning a wafer are disclosed. In an embodiment, the apparatus includes a sensor arrangement configured to illuminate subsequent edge portions of the wafer edge and to output a first and a second sensor signal, wherein the first sensor signal is based on the transmitted fractions of the illumination and the second sensor signal is based on the reflected fractions of the illumination; and an evaluation unit configured to evaluate the first sensor signal and to determine a first position information indicating a coarse position of the pre-aligning element, and, after having determined the first position information, to determine a second position information based on the second sensor signal and the first position information, wherein the second position information indicates a fine position of the pre-aligning element.
摘要翻译： 公开了一种用于检测晶片上的预对准元件的装置和用于预定位晶片的方法。 在一个实施例中，该装置包括被配置为照亮晶片边缘的后续边缘部分并输出第一和第二传感器信号的传感器装置，其中第一传感器信号基于照射的传输分数和第二传感器信号 基于照明的反射分数; 以及评估单元，被配置为评估所述第一传感器信号并确定指示所述预对准元件的粗略位置的第一位置信息，并且在确定了所述第一位置信息之后，基于所述第二传感器确定第二位置信息 信号和第一位置信息，其中第二位置信息指示预对准元件的精细位置。
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公开(公告)号：US20240364271A1
公开(公告)日：2024-10-31
申请号：US18636994
申请日：2024-04-16
发明人： Rüdiger Bauder , Mikhail Shirokov
CPC分类号： H03F1/0288 , H03F3/211 , H03F2200/451
摘要： An inverted Doherty-type amplifier comprises a distribution network having a first input port; a main signal path coupled to a first output port of the distribution network, the main signal path comprising a main amplifier; a first peak signal path coupled to a second output port of the distribution network, the first peak signal path comprising a first phase adjustment network, a first peak amplifier having an input coupled to an output of the first phase adjustment network, and a second phase adjustment network having an input coupled to an output of the first peak amplifier; and a combining network coupled to an output of the main amplifier and an output of the second phase adjustment network.
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公开(公告)号：US12132475B1
公开(公告)日：2024-10-29
申请号：US18448702
申请日：2023-08-11
发明人： Marcus Nuebling , Peter Weiß , Christoph Bauer , Christian Novak
IPC分类号： H03K17/296
CPC分类号： H03K17/296
摘要： A device for controlling a current controlled switching element includes an output node, a current driver circuit, and detection circuitry. The output node is configured to electrically couple to a control node of the current controlled switching element. The current controlled switching element is configured to change from operating in an off-state to operating in an on-state when a charge supplied to the control node causes a voltage at the control node to be greater than an activation threshold. The current driver circuit configured to output an activation current to the output node in response to a switching signal indicating to change from operating the current controlled switching element from the off-state to the on-state. The detection circuitry is configured to detect, based on the voltage at the control node, when a switching event has occurred while the current driver circuit outputs the activation current.
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公开(公告)号：US12132104B2
公开(公告)日：2024-10-29
申请号：US18466039
申请日：2023-09-13
发明人： Dethard Peters , Sascha Axel Baier , Tomas Reiter , Sandeep Walia , Frank Wolter
CPC分类号： H01L29/7815 , G01K7/16 , G01R31/2628 , G01R31/27 , G01R31/2831 , G01R31/52 , H01L29/1608 , H01L29/7805 , H01L29/7813
摘要： A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source regions of the current sense transistor. The doped resistor region has an opposite conductivity type as the source regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.
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6.发明公开公开(公告)号：US20240353529A1
公开(公告)日：2024-10-24
申请号：US18404133
申请日：2024-01-04
CPC分类号： G01S7/356 , G01S7/2883 , G01S13/584
摘要： Some aspects of the present disclosure relate a radar system including a radio frequency (RF) receiver that receives radar data on a plurality of receive antennas. A fast Fourier transform (FFT) circuit is coupled to the RF receiver. The FFT circuit performs a FFT on the radar data to provide a plurality of Range-Doppler coordinate pairs that pertain to the plurality of receive antennas. An integration block is coupled to the FFT circuit, and sums multiple Range-Doppler coordinate pairs for respective Doppler bins to provide a plurality of Range-Doppler sums. The integration block also sums multiple Range-Doppler sums within the plurality of Range-Doppler sums to provide an integration result. The multiple Range-Doppler coordinate pairs that are summed are spaced apart from one another by a Doppler offset.
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公开(公告)号：US12126738B2
公开(公告)日：2024-10-22
申请号：US17381580
申请日：2021-07-21
发明人： Thomas Poeppelmann , Wieland Fischer , Bernd Meyer
CPC分类号： H04L9/3271 , H04L9/0869 , H04L9/3066 , H04L9/3263
摘要： A method for providing challenges to a device comprising (i) compiling a first challenge based on a first random value and a parameter; (ii) compiling a second challenge based on a second random value, the parameter and based on the first challenge or any intermediate result thereof; and (iii) providing the first challenge and the second challenge to the device.
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公开(公告)号：US12124076B2
公开(公告)日：2024-10-22
申请号：US17361667
申请日：2021-06-29
发明人： Boris Kirillov , Maksym Sladkov
CPC分类号： G02B6/0076 , G02B6/0028 , G02B6/0031 , G02B26/0833 , G02B26/101 , G02B27/0172 , G02B2027/0112 , G02B2027/0178
摘要： An image projection system includes a cascaded waveguide system including a first waveguide and a second waveguide arranged downstream along a transmission path from the first waveguide. The first waveguide includes a first output structure and is configured to receive a light beam having a first beam width and output a first expanded light beam at the first output structure, wherein the first expanded light beam has a second beam width greater than the first beam width. The second waveguide includes a second output structure and is configured to receive the first expanded light beam from the first waveguide and output the first expanded light beam multiple times from the second output structure as a plurality of output light beams. Each of the plurality of output light beams is output from a different area of the second output structure along a propagation direction of the second waveguide.
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公开(公告)号：US12122667B2
公开(公告)日：2024-10-22
申请号：US18467897
申请日：2023-09-15
CPC分类号： B81B7/0051 , B81C1/00325 , B81B2203/033 , B81B2207/07 , B81B2207/096 , B81C2203/0118
摘要： A method for producing sensor devices includes generating a semiconductor wafer having a plurality of sensor chips, wherein each sensor chip comprises a micro-electromechanical systems (MEMS) structure arranged at a main surface of the semiconductor wafer; forming a plurality of gas-permeable covers over the main surface of the semiconductor wafer, wherein each gas-permeable cover covers a corresponding MEMS structure of the MEMS structures and forms a cavity above the corresponding MEMS structure; and singulating the semiconductor wafer into a plurality of sensor devices.
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公开(公告)号：US20240347456A1
公开(公告)日：2024-10-17
申请号：US18606152
申请日：2024-03-15
IPC分类号： H01L23/528 , H01L23/532 , H01L29/16 , H01L29/66 , H01L29/78
CPC分类号： H01L23/5283 , H01L23/53238 , H01L23/5329 , H01L29/1608 , H01L29/66045 , H01L29/7827
摘要： A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a silicon carbide (SiC) semiconductor body having a first surface and a second surface opposite to the first surface. A first wiring level is arranged over the first surface. The first wiring level includes a first lower source or emitter pad and a second lower source or emitter pad. A second wiring level is arranged over the first wiring level. The second wiring level includes a gate pad and a source or emitter pad. The source or emitter pad of the second wiring level is electrically connected to the first lower source or emitter pad and to the second lower source or emitter pad of the first wiring level. The first wiring level further includes a gate line laterally arranged between the first lower source or emitter pad and the second lower source or emitter pad. The gate line is vertically arranged between the source or emitter pad of the second wiring level and the first surface. The gate line is electrically insulated from the source or emitter pad of the second wiring level by an intermediate dielectric structure.
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