公开(公告)号：US20240222961A1

公开(公告)日：2024-07-04

申请号：US18526607

申请日：2023-12-01

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Jifeng Zhou ,  Tsung-Wen Mou

IPC: H02H9/04

CPC classification number: H02H9/041

Abstract: In one embodiment, an asymmetric bidirectional surge protection device is provided, including a crowbar device, and a clamping device, wherein the crowbar device is formed in a first area of a semiconductor die, and wherein the clamping device is formed in a second area of the semiconductor die, wherein the second area surrounds the first area.

公开(公告)号：US20240145348A1

公开(公告)日：2024-05-02

申请号：US18495831

申请日：2023-10-27

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Lucas Zhang ,  Chao Gao ,  Lei He

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/04

CPC classification number: H01L23/49513 ,  H01L23/041 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/40 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/73263

Abstract: A semiconductor device including a housing, a semiconductor chip disposed within the housing and having first and second metal electrodes, a first lead frame having a first end extending out of the housing and a second end terminating in a die pad, a top surface of the die pad including a cavity having a first quantity of solder disposed therein for electrically connecting the die pad to the first metal electrode, a second lead frame having a first end extending out of the housing and having a second end disposed adjacent the semiconductor chip, and a clip having a first end connected to the second of the lead frame and a second end extending over the semiconductor chip, a bottom surface of the second end of the clip including a recess having a second quantity of solder disposed therein for electrically connecting the clip to the second metal electrode.

公开(公告)号：US20230326838A1

公开(公告)日：2023-10-12

申请号：US18132490

申请日：2023-04-10

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Lucas Zhang ,  Charlie Cai ,  Jifeng Zhou

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49568 ,  H01L23/49503 ,  H01L23/49517 ,  H01L24/40 ,  H01L23/564 ,  H01L2224/40175

Abstract: A discrete power semiconductor package includes a semiconductor chip, a heatsink, a first lead, a second lead, and a clip. The heatsink is adjacent the semiconductor chip and draws heat away from the semiconductor chip. The clip binds the semiconductor chip to the heatsink and includes a chip linker, a first terminal, and a second terminal. The chip linker is atop the semiconductor chip. The first terminal connects to the first lead and the second terminal connects to the second lead.

公开(公告)号：US11139287B2

公开(公告)日：2021-10-05

申请号：US16304223

申请日：2016-05-23

Applicant: Littelfuse Semiconductor (WUXI) Co., Ltd.

Inventor： Chuanfang Chin ,  Kueir-Liang Lu ,  Lei Shi ,  Tsungwen Mou

IPC: H01L27/02 ,  H01L23/525 ,  H02H9/04 ,  H02H1/04 ,  H02H3/22

Abstract: A transient voltage suppression (TVS) device including a TVS diode having a first electrode and a second electrode, an insulating plate disposed on the first electrode, a first terminal lead connected to the insulating plate, a second terminal lead connected to the second electrode, and an thermal cutoff element connecting the first terminal lead to the first electrode, the thermal cutoff element configured to melt and break an electrical connection between the first terminal lead and the first electrode when a temperature of the TVS diode exceeds a predetermined safety temperature.

公开(公告)号：US20210175224A1

公开(公告)日：2021-06-10

申请号：US17111690

申请日：2020-12-04

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Jianfei ZENG ,  CAI Yingda

IPC: H01L27/02 ,  H01L29/866 ,  H01L29/66

Abstract: In one embodiment, an asymmetric TVS device may include a semiconductor substrate, comprising an inner region, the inner region having a first polarity, and a first surface region, disposed on a first surface of the semiconductor substrate, the first surface region comprising a second polarity, opposite the first polarity. The asymmetric TVS device may also include a second surface region, comprising the second polarity, and disposed on a second surface of the semiconductor substrate, opposite the first surface, wherein the first surface region comprises a first dopant concentration, and wherein the second surface region comprises a second dopant concentration, greater than the first dopant concentration.

公开(公告)号：US20240234406A9

公开(公告)日：2024-07-11

申请号：US18490963

申请日：2023-10-20

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Boris Rosensaft ,  Jifeng Zhou ,  Ulrich Kelberlau

IPC: H01L27/02 ,  H01L29/66 ,  H01L29/861

CPC classification number: H01L27/0255 ,  H01L29/66136 ,  H01L29/8613

Abstract: A unidirectional transient voltage suppression (TVS) device. The TVS device may include a first layer, comprising an N+ material, formed on a first part of a first main surface of a substrate and a second layer formed from an N− material. The second layer may extend from a second part of the first main surface, surrounding the first layer, and may extend subjacent to the first layer. The TVS device may include a third layer, comprising a P+ material, wherein the second layer is disposed between the first layer and the third layer. The TVS device may also include an isolation region, extending from the first main surface, and being disposed around the second layer.

公开(公告)号：US20240204088A1

公开(公告)日：2024-06-20

申请号：US18526532

申请日：2023-12-01

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Jifeng Zhou ,  Glenda Zhang ,  Lei He

IPC: H01L29/747 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/747 ,  H01L29/0649 ,  H01L29/66386

Abstract: A semiconductor apparatus including first, second, and third silicon layers, the first silicon being coupled to the second silicon layer and the second silicon layer being coupled to the third silicon layer. The apparatus includes a trench formed in the first silicon layer and in at least a portion of the second silicon layer, an isolation region formed in at least the second silicon layer, where the isolation region extends from the trench to the third silicon layer. The apparatus also includes a first main terminal one and a first gate terminal coupled to a first portion of the first silicon layer, a second main terminal one and a second gate terminal coupled to a second portion of the first silicon layer, a main terminal two coupled to the third silicon layer, and one or more silicon regions in the first silicon layer and in the third silicon layer.

公开(公告)号：US20240096869A1

公开(公告)日：2024-03-21

申请号：US18368829

申请日：2023-09-15

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Lei Shi ,  Jifeng Zhou ,  Xingchong Gu

IPC: H01L27/02 ,  H01L29/06

CPC classification number: H01L27/0248 ,  H01L29/0642

Abstract: A transient voltage suppression (TVS) device. The TVS device may include a substrate, comprising a polarity of a first type. The TVS device may further include a first dopant layer, disposed on a first surface of the substrate, the first layer comprising a polarity of a second type, wherein the first dopant layer forms a P/N junction with the substrate. The TVS device may include a first buffer layer, disposed on the first dopant layer, and a first outer contact layer, disposed on the first buffer layer.

公开(公告)号：US20240096763A1

公开(公告)日：2024-03-21

申请号：US18368883

申请日：2023-09-15

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Lucas Zhang ,  Chao Gao ,  Lei He

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49555 ,  H01L21/4821 ,  H01L24/37 ,  H01L24/40 ,  H01L23/3121 ,  H01L23/49513 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/32258 ,  H01L2224/37012 ,  H01L2224/37139 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/73263

Abstract: A surface mounting apparatus, structure, and associated methods thereof. The surface mounting apparatus includes a housing, a lead frame, at least partially encapsulated by the housing. The lead frame includes a chip mounting surface having a chip mounting pad, and one or more first stress relief features disposed outside of the chip mounting surface. The apparatus further includes another lead frame, at least partially encapsulated by the housing. The other lead frame includes one or more second stress relief features

公开(公告)号：US11552071B2

公开(公告)日：2023-01-10

申请号：US16941889

申请日：2020-07-29

Applicant: Littelfuse Semiconductor (Wuxi) Co., Ltd.

Inventor： Ming-Feng Hsieh ,  Chih-Chun Lin ,  Zhihao Pan

IPC: H01L27/02 ,  H01L21/8222 ,  H01L29/74 ,  H01L27/06

Abstract: Aspects of the present disclosure include one or more semiconductor electrostatic discharge protection devices. At least one embodiment includes a semiconductor electrostatic discharge device with one or more fingers divided into two segments with alternating p-diffusion and n-diffusion regions, with each region being associated with at least one of a portion of a diode and/or silicon-controlled rectifier (SCR).