-
公开(公告)号：US20190221509A1
公开(公告)日：2019-07-18
申请号：US16359485
申请日：2019-03-20
发明人： Eiji HAYASHI , Kyo GO , Kozo HARADA , Shinji BABA
IPC分类号： H01L23/498 , H01L23/373 , H01L23/31 , H01L23/00 , H05K3/46 , H01L23/36 , H01L21/683 , H01L21/56 , H01L21/48
摘要： Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.
-
公开(公告)号：US20180041233A1
公开(公告)日：2018-02-08
申请号：US15727968
申请日：2017-10-09
发明人： Koichi TAKEDA , Hirokazu NAGASE , Shinpei WATANABE
CPC分类号： H04B1/04 , H01L23/60 , H01L2924/16152 , H04B1/40 , H04B5/0012 , H04B5/0075 , H04B5/0081 , H04L1/0041 , H04L25/0266
摘要： The transmitter circuit according to one embodiment includes a pulse generating circuit generating a pulse signal based on edges of input data, a first output driver outputting, based on the pulse signal, a first output pulse signal according to one of the edges to a first end of an external insulating coupling element, a second output driver outputting, based on the pulse signal, a second output pulse signal according to other one of the edges to a second end of the insulating coupling element, and an output stop circuit stopping the first and second output pulse signals from being output for a prescribed period from when a power supply voltage is turned on.
-
公开(公告)号：US20190268425A1
公开(公告)日：2019-08-29
申请号：US16281878
申请日：2019-02-21
发明人： Wataru KURIHARA , Takehiro MIKAMI
摘要： There is a need to acquire more reliable profile information without relying on only the personal subjective judgment on the profile information. Profile information about a dweller is automatically extracted by evaluating and comprehensively determining each of feature amounts concerning the dweller from sensing data acquired from a sensor or a usage log concerning an equipment instrument in a living space based on a criterion for the feature amounts predetermined for a profile item. The reliability of the self-reported profile information is evaluated by comparing and verifying the automatically extracted profile information with the self-reported profile information supplied by the dweller.
-
公开(公告)号：US20140329476A1
公开(公告)日：2014-11-06
申请号：US14258246
申请日：2014-04-22
发明人： Shintaro YAMAMICHI , Hirokazu HONDA , Masaki WATANABE , Junichi ARITA , Norio OKADA , Jun UENO , Masashi NISHIMOTO , Michitaka KIMURA , Tomohiro NISHIYAMA
CPC分类号： H04W84/18 , H01L2224/45144 , H01L2224/48091 , H01L2224/49111 , H01L2924/00014 , H01L2924/00
摘要： A compact electronic device as a constituent element of a wireless communication system using a sensor. A first feature of the device is that a first semiconductor chip is bare-chip-mounted over a front surface of a first wiring board in the form of a chip and a second semiconductor chip is bare-chip-mounted over a second wiring board in the form of a chip. A second feature is that a wireless communication unit and a data processing unit which configure a module are separately mounted. A third feature is that the first and second wiring boards are stacked in the board thickness direction to make up the module (electronic device).
摘要翻译： 作为使用传感器的无线通信系统的组成要素的小型电子设备。 该器件的第一个特征是第一半导体芯片以芯片的形式裸地安装在第一布线板的前表面上，并且第二半导体芯片裸地安装在第二布线板上 芯片的形式。 第二特征是分别安装配置模块的无线通信单元和数据处理单元。 第三特征是第一和第二布线板沿板厚度方向堆叠以组成模块（电子设备）。
-
公开(公告)号：US20230111142A1
公开(公告)日：2023-04-13
申请号：US17886049
申请日：2022-08-11
发明人： Katsumi EIKYU , Yuta NABUCHI , Atsushi SAKAI , Akihiro SHIMOMURA , Satoru TOKUDA
IPC分类号： H01L29/78 , H01L29/06 , H01L29/423 , H01L29/66
摘要： A semiconductor device includes a plurality of unit cells. Each of the plurality of unit cells has a pair of column regions, a pair of trenches formed between the pair of column regions in the X direction, and a pair of gate electrodes formed in the pair of trenches via a gate insulating film, respectively. The two unit cells adjacent in the X direction share one column region of the pair of column regions and are arranged to be symmetrical about the shared column region. Here, a distance between the two trenches, which are adjacent with the one column region interposed therebetween, of the trenches in the two adjacent unit cells is different from a distance between the pair of trenches in the one unit cell.
-
公开(公告)号：US20230090409A1
公开(公告)日：2023-03-23
申请号：US17480007
申请日：2021-09-20
发明人： Eiji TSUKUDA , Katsumi EIKYU
IPC分类号： H01L29/78 , H01L29/66 , H01L29/423
摘要： A semiconductor device includes a semiconductor substrate, a first dielectric film, a conductive film, at least one ferroelectric film, a second dielectric film, a memory gate electrode, a third dielectric film and a control gate electrode. The semiconductor substrate includes a source region and a drain region. The semiconductor substrate includes a first region and a second region between the source region and the drain region. The first dielectric film is formed on the first region. The conductive film is formed on the first dielectric film. The at least one ferroelectric film is formed on one hart of the conductive film. The second dielectric film is formed on the other part of the conductive film. The memory gate electrode is formed on the ferroelectric film. The third dielectric film is formed on the second region. The control gate electrode is formed on the third dielectric film.
-
公开(公告)号：US20230088709A1
公开(公告)日：2023-03-23
申请号：US17879524
申请日：2022-08-02
发明人： Kouji SATOU , Shunya NAGATA , Jiro ISHIKAWA
IPC分类号： G11C11/419 , G11C11/412 , H01L27/11
摘要： A semiconductor device includes a first regulator for generating a first power supply potential, a second regulator for generating a second power supply potential lower than the first power supply potential, and a static random access memory (SRAM) having a normal operation mode and a resume standby mode. The SRAM includes power supply switching circuits receiving a first power supply potential and a second power supply potential, and a memory array including a plurality of memory cells. When the SRAM is in the normal operation mode, the power switch circuit is controlled so that the first power supply potential is supplied from the power switch circuit to the memory array, and when SRAM is in the resume standby mode, the second power supply potential is supplied from the power switch circuit to the memory array.
-
公开(公告)号：US20230083989A1
公开(公告)日：2023-03-16
申请号：US17858555
申请日：2022-07-06
发明人： Tatsuyoshi MIHARA
IPC分类号： H01L27/1159 , H01L27/11587 , H01L27/11592 , H01L21/28 , H01L29/51 , H01L29/66 , H01L29/78
摘要： Reliability of a semiconductor device including a ferroelectric memory is improved. A gate electrode of a ferroelectric memory is formed on a semiconductor substrate so as to arrange a ferroelectric film therebetween, and a semiconductor layer serving as an epitaxial semiconductor layer is formed on the semiconductor substrate on both sides of the gate electrode. The semiconductor layer is formed on a dent portion of the semiconductor substrate. At least a part of each of a source region and a drain region of the ferroelectric memory is formed in the semiconductor layer.
-
公开(公告)号：US20230081996A1
公开(公告)日：2023-03-16
申请号：US17940348
申请日：2022-09-08
发明人： Hiroyuki WATANABE , Hideshi SHIMO
IPC分类号： H03K17/687 , H03K3/03
摘要： A semiconductor device and a method for controlling body bias thereof capable of properly controlling body bias of a transistor even in a case where process variation occurs are provided. Operation speeds of ring oscillators ROSCn and ROSCp respectively change due to an influence of process variation at an NMOS transistor MN side and a PMOS transistor MP side. Speed/bias data represent a correspondence relationship between the operation speeds of the ring oscillators ROSCn and ROSCp and set values V1n and V1p of body biases VBN and VBP. A body bias controller receives speed values Sn and Sp measured for the ring oscillators ROSCn and ROSCp to which the body biases VBN and VBP based on default values are respectively applied, and obtains the set values V1n and V1p on the basis of the speed/bias data.
-
公开(公告)号：US11606097B2
公开(公告)日：2023-03-14
申请号：US17501389
申请日：2021-10-14
发明人： Atsushi Motozawa
摘要： A PLL circuit includes a phase comparator, an integrator path, a proportional path, a current controlled oscillator, a divider, and a double integrator path. The double integrator path includes an intermittent operation gm amplifier, a filter circuit, and a voltage-current conversion circuit. The intermittent operation gm amplifier receives an output voltage of a filter circuit. When a pulse CLK for an intermittent operation is ON, the intermittent operation gm amplifier outputs its voltage to the filter circuit. When the pulse CLK for the intermittent operation is OFF, the intermittent operation gm amplifier does not output the output voltage of the filter circuit to the filter circuit. Even when the pulse CLK for the intermittent operation is OFF, an input potential of the voltage-current conversion circuit is held by the filter circuit, and a current to the current controlled oscillator flows. This makes it possible to oscillate at a high frequency without increasing an area of the filter circuit.
-
-
-
-
-
-
-
-
-
搜索结果
11037 条记录 (耗时 0.031 秒)