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    Interconnect structure
    2.
    发明授权
    Interconnect structure 有权

    公开(公告)号：US12131993B2

    公开(公告)日：2024-10-29

    申请号：US18191894

    申请日：2023-03-29

    申请人： United Microelectronics Corp.

    发明人： To-Wen Tsao ,  Ching-Chang Hsu

    IPC分类号： H01L23/528 ,  H01L23/522

    CPC分类号： H01L23/528 ,  H01L23/5221

    摘要： An interconnect structure is formed on a substrate in a semiconductor device. The interconnect structure includes a dielectric layer and a metal layer. The dielectric layer includes a region and a plurality of protrusions. The metal layer is disposed on the region and between the protrusions, wherein tops of the protrusions are exposed with respect to the metal layer. In a top view of the semiconductor device, the protrusions are distributed in the region. Any straight path crossing through a central region of the region is always intersected with a portion of the protrusions.

    SEMICONDUCTOR STRUCTURE
    8.
    发明公开
    SEMICONDUCTOR STRUCTURE 审中-公开

    公开(公告)号：US20240347459A1

    公开(公告)日：2024-10-17

    申请号：US18317117

    申请日：2023-05-15

    申请人： United Microelectronics Corp.

    发明人： Zhi-Biao Zhou ,  Ding Lung Chen

    IPC分类号： H01L23/528

    CPC分类号： H01L23/5286

    摘要： Provided is a semiconductor including a substrate, a semiconductor element disposed on the substrate, an interconnect structure, first and second power deliver lines, and first and second power deliver network (PDN) structures. The interconnect structure is disposed in the element region, above the semiconductor element, and electrically connected with the semiconductor element. The first and the second power deliver lines are disposed above the interconnect structure and electrically connected to the first and the second power supplies, respectively. The first PDN structure is disposed between the substrate and the first power deliver line, and connected to the first power deliver line and a lowest circuit layer of the interconnect structure. The second PDN structure is disposed between the substrate and the second power deliver line, and connected to the second power deliver line and the lowest circuit layer of the interconnect structure.

    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明公开
    SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20240347338A1

    公开(公告)日：2024-10-17

    申请号：US18755651

    申请日：2024-06-26

    申请人： UNITED MICROELECTRONICS CORP.

    发明人： Shin-Hung Li

    IPC分类号： H01L21/02 ,  H01L21/8258 ,  H01L29/66 ,  H01L29/786

    CPC分类号： H01L21/02565 ,  H01L21/8258 ,  H01L29/66969 ,  H01L29/7869

    摘要： The present invention provides a semiconductor structure, including a substrate, a thin-film transistor (TFT) on the substrate, wherein the thin-film transistor including a TFT channel layer, a first source and a first drain in the TFT channel layer and a first capping layer on the TFT channel layer. A MOSFET is on the substrate, with a second gate, a second source and a second drain on two sides of the second gate and a second capping layer on the second gate, wherein top surfaces of the second capping layer and the first capping layer are leveled, and a first ILD layer is on the first capping layer and the second capping layer, wherein the first ILD layer and the first capping layer function collectively as a gate dielectric layer for the TFT.