-
公开(公告)号:US12132039B2
公开(公告)日:2024-10-29
申请号:US18332069
申请日:2023-06-09
发明人: Ching-Sheng Chu , Chern-Yow Hsu
CPC分类号: H01L25/167 , H01L33/0093 , H01L33/0095 , H01L33/62 , H01L2933/0066
摘要: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first dielectric structure having first inner sidewalls over an interlayer dielectric (ILD) structure. A second dielectric structure is over the first dielectric structure, where the first inner sidewalls are between second inner sidewalls of the second dielectric structure. A sidewall barrier structure is over the first dielectric structure and extends vertically along the second inner sidewalls. A lower bumping structure is between the second inner sidewalls and extends vertically along the first inner sidewalls and vertically along third inner sidewalls of the sidewall barrier structure. An upper bumping structure is over both the lower bumping structure and the sidewall barrier structure and between the second inner sidewalls, where an uppermost point of the upper bumping structure is at or below an uppermost point of the second dielectric structure.
-
公开(公告)号:US12130854B2
公开(公告)日:2024-10-29
申请号:US17175254
申请日:2021-02-12
IPC分类号: G06F16/36 , G06F16/31 , G06F16/335
CPC分类号: G06F16/36 , G06F16/313 , G06F16/335
摘要: A hierarchical dictionary having methods of storing words based on frequency thereof in one or more documents which includes the steps of identifying a hash value corresponding to an inputted word; storing the word in a first hash map and in a second hash map having a substantially larger word storage capacity than the first hash map based on the identified hash value; clearing the first hash map at every predetermined period or triggering event; determining whether a frequency of the word as stored in the second hash map exceeds a predetermined value; and if so, promoting the word from the second hash map to a third hash map having a substantially larger word storage capacity than the second hash map for long-term storage and later retrieval.
-
公开(公告)号:US12127399B2
公开(公告)日:2024-10-22
申请号:US18323458
申请日:2023-05-25
发明人: Meng-Han Lin , Te-Hsin Chiu , Wei-Cheng Wu , Li-Feng Teng , Chien-Hung Chang
IPC分类号: H01L29/06 , H01L21/28 , H01L21/762 , H01L21/765 , H01L23/00 , H01L29/40 , H01L29/66 , H10B20/00 , H10B41/35 , H10B41/43 , H10B41/49
CPC分类号: H10B20/60 , H01L21/76229 , H01L21/765 , H01L23/562 , H01L29/0649 , H01L29/40114 , H01L29/404 , H01L29/66825 , H10B41/35 , H10B41/43 , H10B41/49
摘要: A semiconductor structure including a semiconductor substrate and at least one patterned dielectric layer is provided. The semiconductor substrate includes a semiconductor portion, at least one first device, at least one second device and at least one first dummy ring. The at least one first device is disposed on a first region surrounded by the semiconductor portion. The at least one second device and the at least one first dummy ring are disposed on a second region, and the second region surrounds the first region. The at least one patterned dielectric layer covers the semiconductor substrate.
-
公开(公告)号:US12096629B2
公开(公告)日:2024-09-17
申请号:US18344161
申请日:2023-06-29
发明人: Hung-Ling Shih , Yong-Shiuan Tsair
IPC分类号: H01L29/423 , G11C29/14 , H01L21/28 , H01L21/311 , H01L21/3213 , H01L23/522 , H01L23/528 , H01L29/08 , H01L29/66 , H01L29/788 , H10B41/30 , H10B41/42
CPC分类号: H10B41/42 , G11C29/14 , H01L21/31116 , H01L21/32137 , H01L23/5226 , H01L23/528 , H01L29/0847 , H01L29/40114 , H01L29/42328 , H01L29/66825 , H01L29/788 , H10B41/30 , H01L29/66545
摘要: Various embodiments of the present application are directed to a method for forming an integrated circuit (IC) comprising forming a multilayer film to form a plurality of memory cell structures disposed over a substrate and a plurality of memory test structures next to the memory cell structures. A memory test structure comprises a dummy control gate separated from the substrate by a dummy floating gate. The method further comprises forming a conductive floating gate test contact via along sidewalls of the dummy control gate and the dummy floating gate.
-
公开(公告)号:US12089415B2
公开(公告)日:2024-09-10
申请号:US17569988
申请日:2022-01-06
发明人: Yen-Chieh Huang , Hai-Ching Chen , Chung-Te Lin
摘要: Various embodiments of the present disclosure are directed towards an integrated chip including a semiconductor layer overlying a substrate. A ferroelectric layer overlies the substrate. A pair of source/drain structures are disposed on the semiconductor layer. A lower metal layer is disposed along a lower surface of the ferroelectric layer. An upper metal layer is disposed along an upper surface of the ferroelectric layer.
-
公开(公告)号:US12089278B2
公开(公告)日:2024-09-10
申请号:US17267310
申请日:2020-02-13
申请人: Apple Inc.
发明人: Zhibin Wu , Srinivasan Nimmala , Longda Xing , Vijay Venkataraman , Alosious Pradeep Prabhakar , Krisztian Kiss , Haijing Hu , Cahya A. Masputra
摘要: A service device (e.g., a user equipment (UE), or other network component) can operate generate sidelink communications with peer UE devices based on PC5 unicast link to enable a direct peer-to-peer communication as part of PC5 vehicle-to-everything (V2X) communications. Radio status link detection can be configured based on a keep alive (KA) coordination scheme via the PC5 unicast link to monitor a status of the PC5 unicast link. A KA timer can be configured based on the KA coordination scheme via the PC5 unicast link. The KA coordination scheme is configured to reduce redundant KA requests in the PC5 unicast link to coordinate the direct peer-to-peer communication across the PC5 unicast link.
-
7.
公开(公告)号:US12082505B2
公开(公告)日:2024-09-03
申请号:US17881934
申请日:2022-08-05
发明人: Alexander Kalnitsky , Chun-Ren Cheng , Chi-Yuan Shih , Kai-Fung Chang , Shih-Fen Huang , Yi-Chuan Teng , Yi Heng Tsai , You-Ru Lin , Yan-Jie Liao
IPC分类号: H10N30/04 , G01N25/58 , H10N30/00 , H10N30/067 , H10N30/87 , H10N30/063
CPC分类号: H10N30/10513 , G01N25/58 , H10N30/04 , H10N30/067 , H10N30/877 , H10N30/063
摘要: In some embodiments, a piezoelectric device is provided. The piezoelectric device includes a semiconductor substrate. A first electrode is disposed over the semiconductor substrate. A piezoelectric structure is disposed on the first electrode. A second electrode is disposed on the piezoelectric structure. A heating element is disposed over the semiconductor substrate. The heating element is configured to heat the piezoelectric structure to a recovery temperature for a period of time, where heating the piezoelectric structure to the recovery temperature for the period of time improves a degraded electrical property of the piezoelectric device.
-
8.
公开(公告)号:US12082162B2
公开(公告)日:2024-09-03
申请号:US17286564
申请日:2019-10-31
申请人: Apple Inc.
发明人: Dawei Ying , Lili Wei , Qian Li , Gang Xiong , Geng Wu
CPC分类号: H04W72/04 , H04L5/0048
摘要: A device of a wireless apparatus, a method and a machine readable medium to implement the method. The method includes: decoding a radio resource control (RRC) signal including an information element (IE) having an indication of a semi-statically configured soft resource; determining the soft resource based on the IE; and cancel, based on the soft resource, at least one of a transmission of an uplink (UL) communication or a reception of a downlink (DL) communication by the wireless apparatus.
-
公开(公告)号:US12082160B2
公开(公告)日:2024-09-03
申请号:US17895362
申请日:2022-08-25
申请人: Apple Inc.
发明人: Chunhai Yao , Chunxuan Ye , Dawei Zhang , Wei Zeng , Yushu Zhang , Hong He , Haitong Sun , Weidong Yang , Oghenekome Oteri , Yuchul Kim , Yang Tang , Jie Cui
IPC分类号: H04W72/02 , H04L1/08 , H04W72/0453 , H04W72/20
CPC分类号: H04W72/02 , H04L1/08 , H04W72/0453 , H04W72/20
摘要: Systems, methods, and circuitries are provided for performing sidelink communication. An example method includes receiving, via frequency and time resources of a physical sidelink shared channel (PSSCH), from a second UE, a signal encoding a sequence of bits corresponding to sidelink control information (SCI) stage 2; decoding the sequence of bits based on a SCI stage 2 scrambling initialization value (Cinit) to generate SCI stage 2 for a transport block (TB), wherein Cinit is determined based on at least a portion of a physical sidelink control channel (PSCCH) cyclic redundancy check (CRC) code; and receiving the TB from the first UE based on the SCI stage 2.
-
公开(公告)号:US12069867B2
公开(公告)日:2024-08-20
申请号:US17843236
申请日:2022-06-17
发明人: Bi-Shen Lee , Hsing-Lien Lin , Hsun-Chung Kuang , Yi Yang Wei
摘要: In some embodiments, the present disclosure relates to a method of forming an integrated chip. The method includes forming a bottom electrode layer over a substrate and forming a seed layer over the bottom electrode layer. A ferroelectric switching layer is formed over the bottom electrode layer and to contact the seed layer. The ferroelectric switching layer is formed to have a first region with a first crystal phase and a second region with a different crystal phase. A top electrode layer is formed over the ferroelectric switching layer. One or more patterning processes are performed on the bottom electrode layer, the seed layer, the ferroelectric switching layer, and the top electrode layer to form a ferroelectric random access memory (FeRAM) device.
-
-
-
-
-
-
-
-
-