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公开(公告)号：US07993733B2
公开(公告)日：2011-08-09
申请号：US12070660
申请日：2008-02-20
CPC分类号： G02B1/14 , C23C16/308 , C23C16/407 , C23C16/511 , C23C16/515 , C23C16/52 , G02B1/10 , Y10T428/24942 , Y10T428/2495 , Y10T428/24975
摘要： The invention includes the structure of a multilayer protective coating, which may have, among other properties, scratch resistance, UV absorption, and an effective refractive index matched to a polymer substrate such as polycarbonate. Each layer may contain multiple components consisting of organic and inorganic materials. The multilayer protective coating includes interleaved organic layers and inorganic layers. The organic layers may have 20% or more organic compounds such as SiOxCyHz. The inorganic layers may have 80% or more inorganic materials, such as SiO2, SiOxNy, and ZnO, or mixtures thereof. Each layer of the multilayer protective coating is a micro layer and may have a thickness of 5 angstroms or less in various embodiments. The multilayer protective coating may contain in the order of hundreds or thousands of micro layers, depending upon the design requirement of applications. In each micro layer, the components may have substantially continuous variations in concentration.
摘要翻译： 本发明包括多层保护涂层的结构，其可以具有与诸如聚碳酸酯的聚合物基材匹配的耐刮擦性，UV吸收和有效折射率等特性。 每个层可以包含由有机和无机材料组成的多个组分。 多层保护涂层包括交错的有机层和无机层。 有机层可以具有20％以上的有机化合物，例如SiO x C y H z。 无机层可以具有80％以上的无机材料，例如SiO 2，SiO x N y和ZnO，或其混合物。 多层保护涂层的每层是微层，并且在各种实施方案中可以具有5埃或更小的厚度。 取决于应用的设计要求，多层保护涂层可以包含数百或数千个微层的数量级。 在每个微层中，组分可以具有基本上连续的浓度变化。
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公开(公告)号：US07993647B2
公开(公告)日：2011-08-09
申请号：US11630880
申请日：2005-06-22
CPC分类号： C07K16/1072 , G01N33/56988 , G01N2333/163
摘要： The present invention provides monoclonal antibodies to HIV-1 Vpr and hybridoma cell lines that produce the monoclonal antibodies to HIV-1 Vpr. Methods for use of such antibodies in the detection of HIV-1 infection are also provided.
摘要翻译： 本发明提供了针对HIV-1Vpr的单克隆抗体和产生HIV-1Vpr单克隆抗体的杂交瘤细胞系。 还提供了在检测HIV-1感染中使用这种抗体的方法。
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公开(公告)号：US07941353B2
公开(公告)日：2011-05-10
申请号：US10464055
申请日：2003-06-17
申请人： Nigel King , Wakana Masumoto , Peter Heller , Melanie Harp
发明人： Nigel King , Wakana Masumoto , Peter Heller , Melanie Harp
IPC分类号： G06Q40/00
摘要： A system for displaying financial information includes a financial statement having a set of financial accounts, a set of business processes associated with the set of financial accounts, and an financial statement manager for displaying the financial statement and the associated set of business processes. The financial statement manager is further adapted to display the financial statement and the set of risks associated with the set of financial accounts, the financial statement and a set of risk controls associated with the set of financial accounts, and/or the financial statement and a set of sample transactions associated with the set of financial accounts. The financial statement manager is further adapted to import the financial statement, which can be encoded in XML format. The system includes a web server for displaying the financial statement and the associated set of business processes as a web page on a user's web browser.
摘要翻译： 用于显示财务信息的系统包括具有一组财务账户的财务报表，与该组金融账户相关联的一组业务流程，以及用于显示财务报表和相关业务流程集合的财务报表管理器。 财务报表经理进一步调整显示财务报表和与该组财务账目相关的风险集合，财务报表和与该组财务报表相关的一组风险控制，和/或财务报表和 与该组财务帐户相关联的一组样本交易。 财务报表经理进一步适应导入可以以XML格式编码的财务报表。 该系统包括一个Web服务器，用于在用户的网页浏览器上显示财务报表和相关的业务流程集合作为网页。
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公开(公告)号：US07923683B2
公开(公告)日：2011-04-12
申请号：US12258965
申请日：2008-10-27
申请人： Qi Hua Zhang , Chorng Shyr Niou , Pan Liu , Ming Li
发明人： Qi Hua Zhang , Chorng Shyr Niou , Pan Liu , Ming Li
CPC分类号： G01N1/286 , G01N2001/2873 , G01N2033/0095 , H01L22/12
摘要： A method for analyzing a sample for the manufacture of integrated circuits, e.g., dynamic random access memory devices, commonly called DRAMS. The method also provides an integrated chip including a thickness, a width, and a length. In a specific embodiment, the integrated chip has at least one elongated structure through a portion of the thickness, while being normal to the width and the length. In a specific embodiment, the elongated structure has a structure width and a structure length that extends through a vertical portion of the thickness. The method includes removing a slice of the integrated chip from a portion of the thickness in a directional manner normal to the structure length. In a specific embodiment, the slice is provided through an entirety of the one elongated structure along the structure length to cause a portion of a thickness of the slice providing the elongated structure to be of a substantially uniform sample thickness. The method also includes capturing one or more images through a portion of the slice using a transmission electron microscope.
摘要翻译： 用于分析用于制造集成电路的样本的方法，例如通常称为DRAMS的动态随机存取存储器件。 该方法还提供了包括厚度，宽度和长度的集成芯片。 在具体实施例中，集成芯片具有穿过厚度的一部分的至少一个细长结构，同时垂直于宽度和长度。 在具体实施例中，细长结构具有延伸穿过厚度的垂直部分的结构宽度和结构长度。 该方法包括以垂直于结构长度的定向方式从厚度的一部分去除集成芯片的切片。 在一个具体的实施例中，切片沿着结构长度通过整个一个细长结构提供，以使切片的厚度的一部分提供细长结构，使其具有基本均匀的样本厚度。 该方法还包括使用透射电子显微镜捕获通过切片的一部分的一个或多个图像。
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公开(公告)号：US07902831B2
公开(公告)日：2011-03-08
申请号：US12016947
申请日：2008-01-18
申请人： Mustafa Cemal Top , Edward Kurtek , Johan Ras , Dung Huynh , Stan Weitz , Chris Stanley Nelson
发明人： Mustafa Cemal Top , Edward Kurtek , Johan Ras , Dung Huynh , Stan Weitz , Chris Stanley Nelson
CPC分类号： G06K7/00 , G01R31/002
摘要： Methods of performing electrostatic discharge testing on a transaction card are disclosed. A transaction card may be placed on an insulated surface. A grounding probe may be placed at a first location on the transaction card. A discharge probe may be charged to a known voltage level. The discharge probe may then be discharged at a second location on the transaction card. A discharge wave shape may be recorded from the ground probe, and one of a pass condition and a fail condition may be assigned based on at least the value of the known voltage level as compared to a reference voltage level. The first location and the second location may each be selected from a plurality of areas on the transaction card.
摘要翻译： 公开了在交易卡上执行静电放电测试的方法。 交易卡可以放置在绝缘表面上。 接地探针可以放置在交易卡上的第一个位置。 放电探针可以被充电到已知的电压电平。 然后，放电探针可以在交易卡上的第二位置排出。 可以从接地探针记录放电波形，并且可以至少基于与参考电压电平相比的已知电压电平的值来分配通过条件和失败条件之一。 第一位置和第二位置可以分别从交易卡上的多个区域中选择。
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公开(公告)号：US07901880B2
公开(公告)日：2011-03-08
申请号：US10971339
申请日：2004-10-21
CPC分类号： C12Q1/683 , C12Q1/6858 , C12Q2521/331 , C12Q2545/101
摘要： The present invention provides methods for detecting the presence of methylation at a locus within a population of nucleic acids.
摘要翻译： 本发明提供了用于检测核酸群体内的位点甲基化存在的方法。
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公开(公告)号：US07901708B2
公开(公告)日：2011-03-08
申请号：US10611274
申请日：2003-06-30
申请人： Ian MacLachlan , Lloyd Brian Jeffs , Lorne R. Palmer , Cory Giesbrecht , Noelle Giesbrecht, legal representative
CPC分类号： A61K9/1271 , A61K9/127 , A61K9/1277 , A61K31/7084 , A61K31/7088 , A61K47/10 , A61K47/24 , A61K47/44
摘要： The present invention provides apparatus and processes for producing liposomes. By providing a buffer solution in a first reservoir, and a lipid solution in a second reservoir, continuously diluting the lipid solution with the buffer solution in a mixing chamber produces a liposome. The lipid solution preferably comprises an organic solvent, such as a lower alkanol.
摘要翻译： 本发明提供了用于生产脂质体的装置和方法。 通过在第一储存器中提供缓冲溶液，并将第二储存器中的脂质溶液连续地稀释在混合室中的缓冲溶液中的脂质溶液产生脂质体。 脂溶液优选包含有机溶剂，例如低级链烷醇。
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公开(公告)号：US07898549B1
公开(公告)日：2011-03-01
申请号：US11954543
申请日：2007-12-12
CPC分类号： G09G5/363 , G06T5/20 , G09G2320/0247 , G09G2340/0464
摘要： A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.
摘要翻译： 图形处理子系统将边界区域定义为由一个或多个渲染对象占据的显示缓冲器和其他存储器缓冲器的部分。 清除存储器缓冲区时，只需要清除对应于边界区域的缓冲区的部分。 图形管线包括用于存储边界区域值的边界区域存储器。 在渲染期间修改边界区域值，使得每个渲染的图元都落在边界区域值内。 响应于指定边界区域的清除命令，图形处理子系统清除存储器缓冲器的一部分。 清除命令可以包括定义边界区域的一组边界区域值，或者替代地对边界区域存储器的引用。 对于孤立绘制对象的应用程序，边界区域将小于窗口，导致清除内存缓冲区所需的时间减少。
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公开(公告)号：US07890432B2
公开(公告)日：2011-02-15
申请号：US11047513
申请日：2005-01-31
申请人： James M. Mattern
发明人： James M. Mattern
CPC分类号： G07B17/0008 , G07B2017/00161
摘要： A system for providing franking services includes one or more networks, one or more postage meters, and a postal infrastructure data center connected to the one or more meters through the one or more networks, wherein the postal infrastructure data center establishes communication with the one or more meters as required.
摘要翻译： 一种用于提供封印服务的系统包括一个或多个网络，一个或多个邮资计费器和通过一个或多个网络连接到该一个或多个电表的邮政基础设施数据中心，其中邮政基础设施数据中心与该一个或多个网络建立通信， 需要更多米。
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公开(公告)号：US07889204B2
公开(公告)日：2011-02-15
申请号：US11982106
申请日：2007-10-31
申请人： Craig Hansen , John Moussouris , Alexia Massalin
发明人： Craig Hansen , John Moussouris , Alexia Massalin
CPC分类号： G06F9/30014 , G06F9/30007 , G06F9/30021 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/30043 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/3016 , G06F9/30167 , G06F9/32 , G06F9/34 , G06F9/3824 , G06F9/383 , G06F9/3885 , G06F12/0886
摘要： A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.
摘要翻译： 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址，并且基本上大于处理器的数据路径宽度的操作数，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。
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