摘要:
Performance of an electrohydrodynamic fluid accelerator device may be improved and adverse events such as sparking or arcing may be reduced based, amongst other things, on electrode geometries and/or positional interrelationships of the electrodes. For example, in a class of EHD devices that employ a longitudinally elongated corona discharge electrode (often, but not necessarily, a wire), a plurality of generally planar, collector electrodes may be positioned so as to present respective leading surfaces toward the corona discharge electrode. The generally planar collector electrodes may be oriented so that their major surfaces are generally orthogonal to the longitudinal extent of the corona discharge electrode. In such EHD devices, a high intensity electric field can be established in the “gap” between the corona discharge electrode and leading surfaces of the collector electrodes.
摘要:
Failure and repair information collected during self-testing of arrays in an integrated circuit is stored in a centralized array in the integrated circuit. In that way, a centralized array can be read out to provide failure and repair information on the arrays in the integrated circuit rather than having to read from each array. In addition, the failure and repair information may also be stored in the array under test for certain of the arrays.
摘要:
Non-intrusive techniques have been developed to dynamically and selectively alter address translations performed by, or for, a processor. For example, in some embodiments, a memory management unit is configured to map from effective addresses in respective effective (or virtual) address spaces to physical addresses in the memory, wherein the mappings performed by the memory management unit are based on address translation entries of an address translation table. For a subset of less than all processes, entry selection logic selects from amongst plural alternative mappings coded in respective ones of the address translation entries. For at least some effective addresses mapped for a particular process of the subset, selection of a particular address translation entry is based on an externally sourced value. In some embodiments, only a subset of effective addresses mapped for the particular process are subject to dynamic runtime alteration of the address translation entry selection.
摘要:
An apparatus includes a bit cell of a programmable memory circuit. The bit cell includes a programmable device. The bit cell includes a first device having a first type. The first device is configured to conduct a first current between a first node and a second node in response to a first value of a signal on the word line and a signal on a bit line. The programmable device is configured to be programmed in response to a first level of the first current. The bit cell includes a circuit coupled to the second node. The circuit is configured to reduce a leakage current through the first device in response to a second value of the signal on the word line and based on a feedback signal. In at least one embodiment of the apparatus, the feedback signal is based on a signal on the bit line.
摘要:
A method for accessing a reverse channel for communication from a remote unit to a base station is disclosed. The method includes waiting a random period of time in response to determining that the reverse channel is available at a first time. The method also includes monitoring a forward channel after expiration of the random period of time to determine whether the reverse channel is available at a second time. The method further includes transmitting a first portion of data on the reverse channel in response to determining that the reverse channel is available at the second time.
摘要:
A method includes recording a user-level interrupt as undeliverable in a mailbox at least partially based on an interrupt domain identifier and an interrupt recipient identifier included in a user-level interrupt message associated with the user-level interrupt. The recording is at least partially based on an indication that the user-level interrupt is undeliverable to a recipient application thread executing on a processor core of a plurality of processor cores in a multi-core system.
摘要:
An encapsulated MEMS device and a method to form an encapsulated MEMS device are described. An apparatus includes a first substrate having a silicon-germanium seal ring disposed thereon and a second substrate having a metal seal ring disposed thereon. The metal seal ring is aligned with and bonded to the silicon-germanium seal ring to provide a sealed cavity. A MEMS device is housed in the sealed cavity. A method includes forming a silicon-germanium seal ring on a first substrate and forming a metal seal ring on a second substrate. The metal seal ring is bonded to the silicon-germanium seal ring to provide a sealed cavity that houses a MEMS device.
摘要:
A virtualized computer system includes at least one guest environment (guest), a service guest environment (SG) and trusted software. The at least one guest includes at least one driver having a first private message interface. The SG includes a first USB host controller (HC) driver, which is in communication with a USB HC. The first USB HC driver includes a second private message interface. The trusted software is in communication with the guest and the SG. The trusted software includes a data intercept/routing mechanism that facilitates secure communication between at least one USB device coupled to the USB HC and the guest using the first and second private message interfaces.
摘要:
Circuits and methods are described for decoding exemplary memory arrays of programmable and, in some embodiments, re-writable passive element memory cells, which are particularly useful for extremely dense three-dimensional memory arrays having more than one memory plane. In addition, circuits and methods are described for selecting one or more array blocks of such a memory array, for selecting one or more word lines and bit lines within selected array blocks, for conveying data information to and from selected memory cells within selected array blocks, and for conveying unselected bias conditions to unselected array blocks.
摘要:
A hierarchical memory request stream arbitration technique merges coherent memory request streams from multiple memory request sources and arbitrates the merged coherent memory request stream with requests from a non-coherent memory request stream. In at least one embodiment of the invention, a method of generating a merged memory request stream from a plurality of memory request streams includes merging coherent memory requests into a first serial memory request stream. The method includes selecting, by a memory controller circuit, a memory request for placement in the merged memory request stream from at least the first serial memory request stream and a merged non-coherent request stream. The merged non-coherent memory request stream is at least partially based on an indicator of a previous memory request selected for placement in the merged memory request stream.