-
公开(公告)号：US07245652B2
公开(公告)日：2007-07-17
申请号：US09734885
申请日：2000-12-13
申请人： Alice Wilson
发明人： Alice Wilson
IPC分类号： H04B1/00
CPC分类号： H04B1/7115 , H04B1/7117
摘要： A rake combiner for a CDMA rake receiver, the combiner comprising a receiver for receiving a plurality of multipath components of a signal; a memory; a controller arranged to store a first multipath component in the memory; a summer for summing the first multipath component with a second multipath component to provide a combined signal; wherein the controller is arranged to store the combined signal in the memory.
摘要翻译： 一种用于CDMA耙式接收机的耙式组合器，所述组合器包括用于接收信号的多个多径分量的接收机; 记忆 控制器，被布置成在存储器中存储第一多路分量; 用于将第一多径分量与第二多径分量相加以提供组合信号的加法器; 其中所述控制器被布置成将所述组合信号存储在所述存储器中。
-
公开(公告)号：US5991857A
公开(公告)日：1999-11-23
申请号：US360612
申请日：1994-12-21
申请人： Anno J Koetje , Jukka Ranta , Alice Wilson
发明人： Anno J Koetje , Jukka Ranta , Alice Wilson
CPC分类号： H04L1/0059 , H03M13/2764 , H03M13/2785 , H04L1/0043 , H04L1/0071
摘要： An interleaving process in which data is interleaved or interleaved data is de-interleaved. Input data units are distributed over a plurality of output groups of data units. In GSM telephony, input bits are distributed over nineteen transmission bursts. Incoming data units are written to a contiguous RAM and output groups are read from said RAM. Addressing circuitry controls the writing and reading to the RAM, such that data units are stored until required for an output group. After data has been read, these read locations are re-used for the storage of new input data, such that the duration over which a particular memory location stores a data unit depends upon the interleaving process delay for that particular data unit. The addressing circuitry includes modulo counters, each arranged to generate addressing signals for a respective set of memory locations within the RAM. Look-up tables are used to select modulo counts so as to provide conventional addresses to the RAM. In another embodiment block de-interleaving is performed during the writing of received bits to memory locations. However, said bits are written sequentially to said locations thereby allowing the remaining space to be used for other purposes. In particular, said space may be used for de-interleaving fast associated control channels etc. Bit position de-interleaving is then effected when the data is read from the memory locations or when read from intermediate frame buffer.
摘要翻译： 数据被交织或交织的数据被交织的交错处理。 输入数据单元分布在数据单元的多个输出组上。 在GSM电话中，输入位分布在十九个传输脉冲串上。 传入的数据单元被写入连续的RAM，并且从所述RAM读出输出组。 寻址电路控制对RAM的写入和读取，使得存储数据单元直到输出组需要。 在读取数据之后，这些读取位置被重新用于存储新的输入数据，使得特定存储器位置存储数据单元的持续时间取决于该特定数据单元的交织处理延迟。 寻址电路包括模计数器，每个计数器被布置成为RAM内的相应存储器单元集合生成寻址信号。 查询表用于选择模数，以便向RAM提供常规地址。 在另一个实施例中，在将接收到的比特写入存储器位置期间执行块去交织。 然而，所述位被顺序写入所述位置，从而允许剩余空间用于其他目的。 特别地，所述空间可以用于解交织快速相关联的控制信道等。然后当从存储器位置读取数据或者当从中间帧缓冲器读取数据时，进行位位置解交织。
-
公开(公告)号：US5210486A
公开(公告)日：1993-05-11
申请号：US755673
申请日：1991-09-06
IPC分类号： G01R31/28 , G01R31/3167 , G06F11/26 , G06F17/50
CPC分类号： G01R31/3167
摘要： The present invention relates to a method of testing of digital and analog circuits. If a fault is detected, after stimuli are applied and test measurements are made at some circuit nodes, steps are taken to locate faulty circuit components. At least one further node is selected for measurement on the basis of the levels of information that such nodes can provide. Further measurements aid fault location.For analog circuits, levels of information are determined by calculation of discrimination factors which depend on possible voltage ranges at unmeasured circuit nodes if various components are considered as faulty. The information gained from measurement at a further node is used to reduce the voltage ranges in order to aid selection of another node to measure.
-
公开(公告)号：US20230077213A1
公开(公告)日：2023-03-09
申请号：US18056056
申请日：2022-11-16
摘要： A vehicle camera and record system including a plurality of cameras located around a vehicle. The cameras are positioned such that at least a 360-degree planar view is provided surrounding the vehicle. A control unit is operably coupled to the cameras. The controller includes a computer readable storage device. The cameras will record the surrounding area of the vehicle. Media recorded by the cameras will be stored on the computer readable storage device such that the media can be accessed at a later time and date.
-
5.发明申请公开(公告)号：US20190168099A1
公开(公告)日：2019-06-06
申请号：US16205612
申请日：2018-11-30
申请人： Susannah Lutze , Alice Wilson
发明人： Susannah Lutze , Mikayla Lee , Alice Wilson
IPC分类号： A63B71/06
摘要： This invention relates to a device configured to enable scorekeeping during a competitive activity. The device includes a scoring unit with a display screen. One or more physical inputs are provided to received input signals indicative of a change to the score. A logic unit configured to modify data displayed on the display screen based on: (i) signals from the one or more physical units; and (ii) predefined scoring logic. A mounting unit having a primary aperture configured to facilitate secure mounting of the mounting member to an object, a secondary aperture configured to receive the scoring unit.
-
公开(公告)号：US20200243113A1
公开(公告)日：2020-07-30
申请号：US16719205
申请日：2019-12-18
摘要： A vehicle camera and record system including a plurality of cameras located around a vehicle. The cameras are positioned such that at least a 360-degree planar view is provide surrounding the vehicle. A control unit is operably coupled to the cameras. The controller includes a computer readable storage device. The cameras will record the surrounding area of the vehicle. Media recorded by the cameras will be stored on the computer readable storage device such that the media can be accessed at a later time and date.
-
-
-
-
-
搜索结果
6 条记录 (耗时 0.013 秒)