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    Semiconductor package structure having central leads and method for packaging the same
    1.
    发明授权
    Semiconductor package structure having central leads and method for packaging the same 有权
    具有中心引线的半导体封装结构及其封装方法

    公开(公告)号：US06501187B1

    公开(公告)日：2002-12-31

    申请号：US09996691

    申请日：2001-11-21

    申请人： Nai Hua Yeh ,  Chen Pin Peng ,  Chief Lin ,  Ching-Shui Cheng ,  Allis Chen

    发明人： Nai Hua Yeh ,  Chen Pin Peng ,  Chief Lin ,  Ching-Shui Cheng ,  Allis Chen

    IPC分类号： H01L2328

    CPC分类号： H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/15311 ,  H01L2224/85 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A semiconductor package structure having central leads according to the invention includes a substrate, a semiconductor device, a plurality of wires, and glue. A long slot penetrating through the substrate is formed in the substrate. A plurality of bonding pads formed on the semiconductor device are mounted on substrate. The plurality of bonding pads on the semiconductor device are exposed via the long slot of the substrate. The length of the semiconductor device is smaller than that of the long slot of the substrate so that a channel is formed at one side of the long slot when the semiconductor device is mounted on the substrate. The plurality of wires are arranged within the long slot of the substrate for electrically connecting the plurality of bonding pads on the semiconductor device to the plurality of signal output terminals on the substrate. The glue is provided for sealing the upper surface of the substrate to protect the semiconductor device. The glue is poured into the long slot of the substrate via the channel formed by the long slot of the substrate, for covering the plurality of wires.

    摘要翻译： 根据本发明的具有中心引线的半导体封装结构包括衬底，半导体器件，多根电线和胶水。 在衬底中形成穿过衬底的长槽。 形成在半导体器件上的多个接合焊盘安装在基板上。 半导体器件上的多个接合焊盘经由衬底的长槽露出。 半导体器件的长度小于衬底的长槽的长度，使得当半导体器件安装在衬底上时，在长槽的一侧形成沟道。 多个布线布置在基板的长槽内，用于将半导体器件上的多个接合焊盘电连接到基板上的多个信号输出端子。 提供胶水以密封衬底的上表面以保护半导体器件。 通过由衬底的长槽形成的通道将胶水注入衬底的长槽中，以覆盖多根电线。

    Substrate structure for an integrated circuit package and method for manufacturing the same
    2.
    发明授权
    Substrate structure for an integrated circuit package and method for manufacturing the same 失效
    集成电路封装的基板结构及其制造方法

    公开(公告)号：US06489572B2

    公开(公告)日：2002-12-03

    申请号：US09768981

    申请日：2001-01-23

    申请人： Mon Nan Ho ,  Chih-Hong Chen ,  Yen Cheng Huang ,  Li Huan Chen ,  Kuo Feng Peng ,  Jichen Wu ,  Allis Chen ,  Wen Chuan Chen

    发明人： Mon Nan Ho ,  Chih-Hong Chen ,  Yen Cheng Huang ,  Li Huan Chen ,  Kuo Feng Peng ,  Jichen Wu ,  Allis Chen ,  Wen Chuan Chen

    IPC分类号： H05K103

    CPC分类号： H01L23/49861 ,  H01L2224/48091 ,  H01L2224/48465 ,  Y10T29/49128 ,  Y10T29/49158 ,  Y10T29/4916 ,  Y10T156/109 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained. A method for manufacturing the substrate is also disclosed.

    摘要翻译： 一种用于集成电路封装的衬底结构。 基板电连接到电路板和集成电路。 基板包括多个金属片和胶。 金属板彼此相对布置。 每个金属片包括第一表面和第二表面。 胶被用于密封多个金属片以形成基底。 金属板的第一表面和第二表面暴露于胶的外部，以形成用于电连接到集成电路的多个信号输入端子和用于电连接到电路板的多个信号输出端子。 因此，金属片的信号输出端子可以平滑地电连接到电路板。 此外，可以缩短集成电路和电路板之间的信号传输距离，从而可以获得更好的信号传输效果。 还公开了一种用于制造衬底的方法。

    Package structure for a photosensitive chip
    3.
    发明授权
    Package structure for a photosensitive chip 有权
    感光芯片的封装结构

    公开(公告)号：US06590269B1

    公开(公告)日：2003-07-08

    申请号：US10114201

    申请日：2002-04-01

    申请人： Jason Chuang ,  Allis Chen ,  Jachson Hsieh ,  Hsiu Wen Tu ,  Meng Ru Tsai ,  Mon Nan Ho ,  Fu Yung Huang ,  Yung Sheng Chiu ,  Jichen Wu ,  Chih Cheng Hsu

    发明人： Jason Chuang ,  Allis Chen ,  Jachson Hsieh ,  Hsiu Wen Tu ,  Meng Ru Tsai ,  Mon Nan Ho ,  Fu Yung Huang ,  Yung Sheng Chiu ,  Jichen Wu ,  Chih Cheng Hsu

    IPC分类号： H01L310203

    CPC分类号： H01L31/0203 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A package structure for a photosensitive chip includes a substrate having an upper surface and a lower surface, and a frame layer having a first surface and a second surface. The frame layer is formed on the substrate by way of injection molding with the first surface contacting the upper surface. A cavity is formed between the substrate and the frame layer. The second surface is formed with a depression in which plural projections each having a suitable height are formed. The frame layer is formed directly on the substrate by way of injection molding. The package structure further includes a photosensitive chip arranged within the cavity, a plurality of wires for connecting the substrate to the photosensitive chip, and a transparent layer rested on the projections within the depression. Accordingly, the yield can be improved and the manufacturing processes can be facilitated.

    摘要翻译： 用于感光芯片的封装结构包括具有上表面和下表面的基片和具有第一表面和第二表面的框架层。 框架层通过注射成型形成在基板上，第一表面接触上表面。 在基板和框架层之间形成空腔。 第二表面形成有凹部，其中形成有具有适当高度的多个凸起。 框架层通过注射成型直接形成在基板上。 封装结构还包括布置在空腔内的感光芯片，用于将基板连接到感光芯片的多根导线以及搁置在凹陷内的凸起上的透明层。 因此，可以提高收率并且可以促进制造过程。