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公开(公告)号：US20210005563A1
公开(公告)日：2021-01-07
申请号：US16504236
申请日：2019-07-06
Applicant: Amkor Technology Korea, Inc.
Inventor： Yeong Beom KO , Jo Hyun BAE , Sung Woo LIM , Yun Ah KIM
IPC: H01L23/00 , H01L21/56 , H01L23/31 , H01L23/528
Abstract: In one example, a semiconductor device structure relates to an electronic device, which includes a device top surface, a device bottom surface opposite to the device top surface, device side surfaces extending between the device top surface and the device bottom surface, and pads disposed over the device top surface. Interconnects are connected to the pads, and the interconnects first regions that each extend from a respective pad in in an upward direction, and second regions each connected to a respective first region, wherein each second region extends from the respective first region in a lateral direction. The interconnects comprise a redistribution pattern on the pads. Other examples and related methods are also disclosed herein.
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公开(公告)号：US09664706B2
公开(公告)日：2017-05-30
申请号：US14687141
申请日：2015-04-15
Applicant: SEMICORE Inc. , NTS Co., Ltd , Amkor Technology Korea, Inc.
Inventor： Duk-Soon Choi , In-Seol Hwang , Woo-Yoel Jeong , Seong-Han Park , In-Seob Kwon , Dong-Shin Kim
CPC classification number: G01R1/0466 , G01R31/2891
Abstract: A semiconductor chip testing apparatus is disclosed. The semiconductor chip testing apparatus includes: an upper socket unit which is formed therein with a receiving space receiving an upper semiconductor chip, holds a lower semiconductor chip using a suction airflow passing around the upper semiconductor chip in the receiving space, and electrically connects the lower semiconductor chip to the upper semiconductor chip; a blade block coupled to the upper socket unit to deliver a vacuum pressure for generating the suction airflow in the receiving space; and a lower socket unit on which the lower semiconductor chip held by the upper socket unit is seated, and which is electrically connected to the seated lower semiconductor chip.
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公开(公告)号：US11342276B2
公开(公告)日：2022-05-24
申请号：US16422771
申请日：2019-05-24
Applicant: Amkor Technology Korea, Inc.
Inventor： Ji Young Chung , Jae Ho Lee , Byong Il Heo
IPC: H01L23/552 , H01L23/538 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/48 , H01L21/56 , H01L25/065 , H01L23/498
Abstract: In one example, an electronic device structure includes a substrate having a conductive structure adjacent to a surface. The conductive structure can include a plurality of conductive pads. First and second electronic devices are disposed adjacent to the top surface. The first electronic device is interposed between a first conductive pad and a second conductive pad, and the second electronic device is interposed between the second conductive pad and a third conductive pad. A continuous wire structure including a first bond structure is connected to the first conductive pad, a second bond structure is connected to the second conductive pad, a third bond structure is connected to the third conductive pad, a first wire portion is interconnected between the first bond structure and the second bond structure and disposed to overlie the first electronic device, and a second wire portion is interconnected between the second bond structure and the third bond structure and disposed to overlie the second electronic device. Other examples and related methods are also disclosed herein.
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公开(公告)号：US11121105B2
公开(公告)日：2021-09-14
申请号：US16504236
申请日：2019-07-06
Applicant: Amkor Technology Korea, Inc.
Inventor： Yeong Beom Ko , Jo Hyun Bae , Sung Woo Lim , Yun Ah Kim
IPC: H01L23/00 , H01L21/56 , H01L23/528 , H01L23/31
Abstract: In one example, a semiconductor device structure relates to an electronic device, which includes a device top surface, a device bottom surface opposite to the device top surface, device side surfaces extending between the device top surface and the device bottom surface, and pads disposed over the device top surface. Interconnects are connected to the pads, and the interconnects first regions that each extend from a respective pad in in an upward direction, and second regions each connected to a respective first region, wherein each second region extends from the respective first region in a lateral direction. The interconnects comprise a redistribution pattern on the pads. Other examples and related methods are also disclosed herein.
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公开(公告)号：US20160154023A1
公开(公告)日：2016-06-02
申请号：US14687141
申请日：2015-04-15
Applicant: Amkor Technology Korea, Inc.
Inventor： Duk-Soon CHOI , In-Seol HWANG , Woo-Yoel JEONG , Seong-Han PARK , In-Seob KWON , Dong-Shin KIM
CPC classification number: G01R1/0466 , G01R31/2891
Abstract: A semiconductor chip testing apparatus is disclosed. The semiconductor chip testing apparatus includes: an upper socket unit which is formed therein with a receiving space receiving an upper semiconductor chip, holds a lower semiconductor chip using a suction airflow passing around the upper semiconductor chip in the receiving space, and electrically connects the lower semiconductor chip to the upper semiconductor chip; a blade block coupled to the upper socket unit to deliver a vacuum pressure for generating the suction airflow in the receiving space; and a lower socket unit on which the lower semiconductor chip held by the upper socket unit is seated, and which is electrically connected to the seated lower semiconductor chip.
Abstract translation: 公开了一种半导体芯片测试装置。 半导体芯片测试装置包括：上插座单元，其中形成有容纳上半导体芯片的接收空间，使用在接收空间中穿过上半导体芯片的吸入气流保持下半导体芯片，并且将下部半导体芯片电连接 半导体芯片到上半导体芯片; 叶片块，其联接到所述上插座单元以递送用于在所述接收空间中产生吸入气流的真空压力; 以及下插座单元，其上由上插座单元保持的下半导体芯片就座在其上，并且电连接到就座的下半导体芯片。
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公开(公告)号：US11352252B2
公开(公告)日：2022-06-07
申请号：US16448901
申请日：2019-06-21
Applicant: Amkor Technology Korea, Inc. , Amkor Technology Inc.
Inventor： Ki Yeul Yang , Kyung Han Ryu , Seok Hun Yun , Bora Baloglu , Hyun Cho , Ramakanth Alapati
Abstract: In one example, an electronic device includes a semiconductor sensor device having a cavity extending partially inward from one surface to provide a diaphragm adjacent an opposite surface. A barrier is disposed adjacent to the one surface and extends across the cavity, the barrier has membrane with a barrier body and first barrier strands bounded by the barrier body to define first through-holes. The electronic device further comprises one or more of a protrusion pattern disposed adjacent to the barrier structure, which can include a plurality of protrusion portions separated by a plurality of recess portions; one or more conformal membrane layers disposed over the first barrier strands; or second barrier strands disposed on and at least partially overlapping the first barrier strands. The second barrier strands define second through-holes laterally offset from the first through-holes. Other examples and related methods are also disclosed herein.
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公开(公告)号：US20200373247A1
公开(公告)日：2020-11-26
申请号：US16422771
申请日：2019-05-24
Applicant: Amkor Technology Korea, Inc.
Inventor： Ji Young CHUNG , Jae Ho LEE , Byong Il HEO
IPC: H01L23/552 , H01L23/538 , H01L23/31 , H01L23/00 , H01L25/065 , H01L25/00 , H01L21/48 , H01L21/56
Abstract: In one example, an electronic device structure includes a substrate having a conductive structure adjacent to a surface. The conductive structure can include a plurality of conductive pads. First and second electronic devices are disposed adjacent to the top surface. The first electronic device is interposed between a first conductive pad and a second conductive pad, and the second electronic device is interposed between the second conductive pad and a third conductive pad. A continuous wire structure including a first bond structure is connected to the first conductive pad, a second bond structure is connected to the second conductive pad, a third bond structure is connected to the third conductive pad, a first wire portion is interconnected between the first bond structure and the second bond structure and disposed to overlie the first electronic device, and a second wire portion is interconnected between the second bond structure and the third bond structure and disposed to overlie the second electronic device. Other examples and related methods are also disclosed herein.
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公开(公告)号：US20200176345A1
公开(公告)日：2020-06-04
申请号：US16209585
申请日：2018-12-04
Applicant: AMKOR TECHNOLOGY KOREA, INC.
Inventor： Se Man Oh , Kyoung Yeon Lee , Sang Hyeon Lee , Min Cheol Shin
Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.
